參數(shù)資料
型號: LTC4263IS#TRPBF
廠商: Linear Technology
文件頁數(shù): 4/24頁
文件大?。?/td> 354K
描述: IC IEEE 803.2AF CNTRLR 14-SOIC
標準包裝: 2,500
類型: 以太網(wǎng)供電(PoE)
應(yīng)用: 用于以太網(wǎng)供電(PoE)設(shè)備的電源接口開關(guān)
電源電壓: 48V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 帶卷 (TR)
LTC4263
4
4263fe
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
A
VACD
Voltage Gain OSC to ACOUT
2V d (V
OSC
 V
SS
) d 3V
l
0.95
1.0
1.05
V/V
I
ACDMAX
AC Disconnect Output Current
V
OSC
 V
SS
= 2V, 0V d (V
ACOUT
 V
SS
) d 4V
l
1
 
1
mA
I
ACDMIN
Remain Connected AC Pin Current
V
OSC
 V
SS
 = 2V
l
130
160
190
V
ACDEN
AC Disconnect Enable Signal
V
OSC
 V
SS
, Port On
l
1.5
V
Digital Interface (Note 10)
V
OLED
LED Output Low Voltage
I
LED
 = 10mA
l
1.1
2.2
V
V
ILD
Digital Input Low Voltage
MIDSPAN, PWRMGT , ENFCLS, SD LEGACY   l
l
0.8
0.4
V
V
V
IHD
Digital Input High Voltage
MIDSPAN, PWRMGT , ENFCLS, SD LEGACY   l
l
2.2
2.2
V
V
OZ
Voltage of Legacy Pin if Left Floating
l
1.1
1.25
1.4
V
I
OLEG
Current In/Out of Legacy Pin
0V d (V
LEGACY
 V
SS
) d 5V
l
60
60
I
FLT
Maximum Allowed Leakage of External Components
at Legacy Pin in Force Power-On Mode
l
10
10
Timing Characteristics
t
DET
Detection Time
Beginning to End of Detection
l
270
290
310
ms
t
DETDLY
Detection Delay
PD Insertion to Detection Complete
l
300
620
ms
t
PDC
Classi cation Duration
l
34
37
39
ms
t
PON
Power Turn-On Delay
End of Valid Detect to Application of Power
l
135
145
155
ms
t
RISE
Turn-On Rise Time
V
DD48
 V
OUT
: 10% to 90%
C
PSE
 = 0.1糉
l
40
170
t
OVLD
Overload/Short-Circuit Time Limit
l
52
62
72
ms
t
ED
Error Delay
I
CUT
 Fault to Next Detect
l
3.8
4.0
4.2
s
t
MPDO
Maintain Power Signature (MPS) Disconnect Delay  PD Removal to Power Removal
l
320
350
380
ms
t
MPS
MPS Minimum Pulse Width
PD Minimum Current Pulse Width
Required to Stay Connected (Note 11)
l
20
ms
t
DBO
Midspan Mode Detection Backoff
R
PORT
 = 15.5k?/DIV>
l
3.0
3.2
3.4
s
t
DISDLY
Power Removal Detection Delay
l
0.8
0.95
1.1
s
ELECTRICAL CHARACTERISTICS
 
The l denotes the speci cations which apply over the full operating
temperature range, otherwise speci cations are at T
A
 = 25癈. V
DD48
 V
SS
 = 48V and V
DD5
 not driven externally. All voltages are
relative to V
SS
 unless otherwise noted. (Notes 2, 5)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings 
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device 
pins are negative. All voltages are referenced to V
SS
 unless otherwise
speci ed.
Note 3: 80mA of current may be pulled from the OUT or ACOUT pin 
without damage whether the LTC4263 is powered or not. These pins will
also withstand a positive voltage of V
SS
+ 80V.
Note 4: This IC includes overtemperature protection that is intended 
to protect the device during momentary overload conditions. Junction
temperature will exceed 125癈 when overtemperature protection is active.
Continuous operation above the speci ed maximum operating junction
temperature may impair device reliability.
Note 5: The LTC4263 operates with a negative supply voltage. To avoid 
confusion, voltages in this data sheet are referred to in terms of absolute
magnitude.
Note 6: If the ENFCLS pin is high, I
CUT
 depends on the result of
classi cation. If ENFCLS pin is low, I
CUT
 reverts to its Class 0 speci cation.
Note 7: In order to reduce power dissipated in the switch while charging 
the PD, the LTC4263 reduces the current limit when V
OUT
 V
SS
 is large.
Refer to the Typical Performance Characteristics for more information.
Note 8: The LTC4263 includes a high speed current limit circuit intended to 
protect against faults. The fault protection is activated for port current
in excess of I
FAULT
. After the high speed current limit activates, the short-
circuit current limit (I
LIM
) engages and restricts current to IEEE 802.3af
levels.
Note 9: Class 4 or higher classi  cation current is treated as Class 3.
Note 10: The LTC4263 digital interface operates with respect to V
SS
. All
logic levels are measured with respect to V
SS
.
Note 11: The IEEE 802.3af speci  cation allows a PD to present its 
Maintain Power Signature (MPS) on an intermittent basis without being
disconnected. In order to stay powered, the PD must present the MPS for
t
MPS
 within any t
MPDO
 time window.
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