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參數(shù)資料
| 型號： | LTC4263IS#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 354K |
| 描述： | IC IEEE 803.2AF CNTRLR 14-SOIC |
| 標準包裝： | 2,500 |
| 類型： | 以太網(wǎng)供電（PoE） |
| 應(yīng)用： | 用于以太網(wǎng)供電（PoE）設(shè)備的電源接口開關(guān) |
| 電源電壓： | 48V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SOIC |
| 包裝： | 帶卷 (TR) |
LTC4263
13
4263fe
APPLICATIONS INFORMATION
Power Management
The LTC4263 includes a power management feature
allowing simple implementation of power management
across multiple ports driven by a single power supply. The
PWRMGT pins of all LTC4263 devices are tied together
along with an RC network to prevent over-allocation of
power in a multi-port system.
Immediately following classi cation, the LTC4263 performs
a power management check to ensure power is available
to supply the newly classed PD. The allocated power is
represented by the voltage on the shared PWRMGT node
and the LTC4263 checks the allocated power by measur-
ing this voltage. If the PWRMGT voltage is less than 1V ,
there is power available and the power needs of the new
PD are added to the already allocated power on the node.
To allocate power, a current proportional to the power
needs for the new PD is sourced out of the PWRMGT pin
(Table 2).
Table 2. LTC4263 Power Management
IEEE 802.3af
CLASS
PSE OUTPUT
POWER REQUIRED
LTC4263 PWRMGT
CURRENT
0, 3, 4
15.4W
72.3糀
2
7W
32.8糀
1
4W
18.8糀
For multiple LTC4263s implementing power management,
the PWRMGT pins are connected together and to a RC
network connected to V
SS
as shown in Figure 5. The value of
R
PM
represents the full load output capability of the system
power supply (P
FULL_LOAD
). Select a 1% resistor to set the
full load output power using the following formula:
R
k
W
P
PM
FULL LOAD
=
213 ?"
_
The LTC4263 power management uses pulse width
modulation to set the power requirements of each PD.
Capacitor C
PM
is used as a lowpass lter to generate the
average power requirement for all PDs in the system. Set
C
PM
to 1糉.
If power management is not used, tie PWRMGT to V
SS
.
When additional current is added to the PWRMGT node,
the voltage rises toward the 1V threshold. After adding
current, the LTC4263 veri es that the power supply is not
over-allocated by verifying the node voltage remains below
1V. If the voltage is below 1V , the LTC4263 proceeds to
power the port. If over 1V , the current is removed from
the node, port powering is aborted, and the LTC4263 goes
back into detection mode.
Figure 5. PWRMGT Pin Connections
PWRMGT
V
SS
LTC4263
PWRMGT
V
SS
LTC4263
PWRMGT
V
SS
LTC4263
PWRMGT
V
SS
V
SS
LTC4263
4263 F05
C
PM
1糉
R
PM
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