參數(shù)資料
型號(hào)： LTC3776EGN
廠商： LINEAR TECHNOLOGY CORP
元件分類： 穩(wěn)壓器
英文描述： Dual 2-Phase, No RSENSE Synchronous Controller for DDR/QDR Memory Termination
中文描述： 1 A DUAL SWITCHING CONTROLLER, 825 kHz SWITCHING FREQ-MAX, PDSO24
封裝： 0.150 INCH, PLASTIC, SSOP-24
文件頁數(shù)： 3/28頁
文件大?。?/td> 429K
代理商： LTC3776EGN
3
LTC3776
3776f
ELECTRICAL CHARACTERISTICS
range, otherwise specifications are at T
A
= 25
°
C. V
IN
= 4.2V unless otherwise specified.
PARAMETER
Output Voltage Load Regulation
The
●
denotes specifications that apply over the full operating temperature
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The LTC3776E is guaranteed to meet specified performance from
0
°
C to 70
°
C. Specifications over the –40
°
C to 85
°
C operating range are
assured by design, characterization and correlation with statistical process
controls.
Note 3:
T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formula:
T
J
= T
A
+ (P
D
θ
JA
°
C/W)
Note 4:
Dynamic supply current is higher due to gate charge being
delivered at the switching frequency.
Note 5:
The LTC3776 is tested in a feedback loop that servos I
TH
to a
specified voltage and measures the resultant V
FB
voltage.
Note 6:
Peak current sense voltage is reduced dependent on duty cycle to
a percentage of value as shown in Figure 2.
CONDITIONS
I
TH
= 0.9V (Note 5)
I
TH
= 1.7V
(Note 5)
Measured at V
FB
with Respect to
Regulated Feedback Voltage
MIN
TYP
0.12
–0.12
10
13.3
MAX
0.5
–0.5
50
16
UNITS
%
%
nA
%
V
FB1
Input Current
Overvoltage Protect Threshold
10
Overvoltage Protect Hysteresis
Top Gate (TG) Drive 1, 2 Rise Time
Top Gate (TG) Drive 1, 2 Fall Time
Bottom Gate (BG) Drive 1, 2 Rise Time
Bottom Gate (BG) Drive 1, 2 Fall Time
Maximum Current Sense Voltage (Channel 1)
(SENSE1
+
– SW1)(
V
SENSE(MAX)
) (SOURCE)
3
40
40
50
40
125
85
204
147
100
245
–112
–75
–188
0.833
%
ns
ns
ns
ns
mV
mV
mV
mV
mV
mV
mV
mV
mV
ms
C
L
= 3000pF
C
L
= 3000pF
C
L
= 3000pF
C
L
= 3000pF
IPRG1 = Floating (Note 6)
IPRG1 = 0V
IPRG1 = V
IN
IPRG2 = Floating (Note 6)
IPRG2 = 0V
IPRG2 = V
IN
IPRG2 = Floating (Note 6)
IPRG2 = 0V
IPRG2 = V
IN
Time for V
FB1
to Ramp from 0.05V to 0.55V
●
●
●
●
●
●
110
70
185
127
85
215
–130
–90
–208
0.667
140
100
223
167
105
275
–94
–60
–168
1
Maximum Current Sense Voltage (Channel 2)
(SENSE2
+
– SW2)(
V
SENSE(MAX)
) (SOURCE)
Minimum Current Sense Voltage (Channel 2 Only)
(SENSE2
+
– SW2)(
V
SENSE(MAX)
) (SINK)
●
●
●
Soft-Start Time
Oscillator and Phase-Locked Loop
Oscillator Frequency
Spread Spectrum Disabled (SYNC/SSEN = GND)
PLLLPF = Floating
PLLLPF = 0V
PLLLPF = V
IN
SYNC/SSEN = V
IN
Minimum Switching Frequency
Maximum Switching Frequency
SYNC/SSEN Clocked
Minimum Synchronizable Frequency
Maximum Synchronizable Frequency
●
●
●
460
260
650
550
300
750
610
340
825
kHz
kHz
kHz
Spread Spectrum Frequency Range
450
580
kHz
kHz
Phase-Locked Loop Lock Range
●
●
200
1150
250
kHz
kHz
850
Phase Detector Output Current
Sinking
Sourcing
PGOOD Output
PGOOD Voltage Low
PGOOD Trip Level
f
OSC
> f
SYNC/FCB
f
OSC
< f
SYNC/FCB
–4
4
μ
A
μ
A
I
PGOOD
Sinking 1mA
V
FB
with Respect to Set Output Voltage
V
FB
< Regulated Feedback Voltage, Ramping Positive
V
FB
< Regulated Feedback Voltage, Ramping Negative
V
FB
> Regulated Feedback Voltage, Ramping Negative
V
FB
> Regulated Feedback Voltage, Ramping Positive
125
mV
–13
–16
7
10
–10.0
–13.3
10.0
13.3
–7
–10
13
16
%
%
%
%
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