參數(shù)資料
型號(hào)： LTC3766IGN#TRPBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： 穩(wěn)壓器
英文描述： SWITCHING CONTROLLER, 316 kHz SWITCHING FREQ-MAX, PDSO28
封裝： 0.150 INCH, LEAD FREE, PLASTIC, SSOP-28
文件頁(yè)數(shù)： 31/60頁(yè)
文件大?。?/td> 607K
代理商： LTC3766IGN#TRPBF
LTC3766
37
3766f
APPLICATIONS INFORMATION
where QGPRI is the total gate charge of all primary-side
MOSFETs, QGSEC is the total gate charge of all secondary-
side MOSFETs, and NPT is the turns ratio of the pulse
transformer. Note that the primary-side current is scaled
by the turns ratio of the pulse transformer. The 18mA
constant in the above equation includes typical gate drive
switching current as well as losses associated with the
pulse transformer.
Using VOUT Directly for Secondary-Side Bias
The simplest method of generating secondary-side bias
is to directly use the output voltage of the converter. This
is only practical when VOUT is in the range of 5V to 15V.
When VOUT is in the range of 5V to 10V, it can be directly
connected to VCC as shown in Figure 4a. When VOUT is in
the range of 6V to 15V, it can be used as a bias input to the
VAUX regulator as shown in Figure 4b. For output voltages
higher than 15V, this method is generally not practical
due to high power dissipation. This simple method also
does not provide constant current limit operation at lower
output voltage. It also does not provide a quick hand-off
to the secondary and is not recommended for PolyPhase
applications.
Using a Peak Charge Circuit for Secondary-Side Bias
A common way to generate a bias voltage on the second-
ary side is by using a peak charge circuit connected to the
transformer secondary, as shown in Figure 19. This circuit
is useful for generating an unregulated bias voltage that
can be directly tied to the VIN pin of the chip and used as
an input to the high voltage linear regulator.
The peak charge circuit is capable of providing bias even at
low output voltages, so it is a good choice when constant
current limit operation is needed over a wide VOUT range.
Since it provides a bias voltage even when the converter
is operating at tiny duty cycles, the peak charge is also
a good choice for PolyPhase applications where a quick
hand-off to secondary is important. However, since the
output of a peak charge circuit directly follows changes
in the converter input voltage, it is should only be used in
applications where the input voltage varies by 2:1 or less.
Note that for bias voltages on the VIN pin of 28V or greater,
the internal 30V clamp will draw between 3.5mA and 7mA.
This will result in 100mW to 200mW of additional power
dissipation in the LTC3766. To limit the initial charging
current out of the peak charge circuit, use a series resis-
tor RPK in the range of 1Ω to 4Ω. A schottky diode DPK
with a peak surge current rating of 5A or higher should
also be used, and the pass transistor Q1 should have a
minimum beta of at least 200. Capacitor CPK should be a
ceramic capacitor with a value of at least 2.2μF or greater.
During open-loop start-up, it is imperative that the peak
charge bias come up and control is transferred to the
secondary before an output overvoltage can occur. Since
a peak charge circuit is not directly coupled to the output
voltage of the converter, care must be taken to ensure
that the primary-side soft-start is not too fast relative to
the rise time of the peak charge bias on the secondary
side. The time required for the peak charge bias voltage
to rise to a level that allows control to be handed off to
the secondary can be approximated using:
tBIAS ≈10
3 R
EQCPKCSSP + 150s
where REQ is the sum of RPK and the series resistance of
diode DPK, and CSSP is the LTC3765 soft-start capacitor.
During open-loop soft-start, the time required for the
converter output voltage to reach a given level VHO can
be approximated using
tOUT ≈10
4
CSSP2 VHO
( )2LCOUTfSW
VIN(MIN)
NS
NP
2
1/3
The above equation assumes that there is no load current,
which is the worst-case condition for output voltage rise.
VIN
FROM
TRANSFORMER
SECONDARY
RPK
DPK
CVCC
NDRV
LTC3766
VBIAS = 6V TO 32V
VCC
CPK
Q1
3766 F19
Figure 19. Peak Charge Circuit for Secondary Bias
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