參數(shù)資料
型號: LTC3728LZEUH
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 3 A DUAL SWITCHING CONTROLLER, 590 kHz SWITCHING FREQ-MAX, PQCC28
封裝: 5 X 5 MM, PLASTIC, MO-220WHHD, QFN-28
文件頁數(shù): 31/32頁
文件大?。?/td> 467K
代理商: LTC3728LZEUH
LTC3728LZ
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3728lzf
PIN FUNCTIONS
VOSENSE1, VOSENSE2: Error Amplier Feedback Input.
Receives the remotely-sensed feedback voltage for each
controller from an external resistive divider across the
output.
PLLFLTR: Filter Connection for Phase-Locked Loop. Alter-
natively, this pin can be driven with an AC or DC voltage
source to vary the frequency of the internal oscillator.
PLLIN: External Synchronization Input to Phase Detector.
This pin is internally terminated to SGND with 50kΩ. The
phase-locked loop will force the rising top gate signal of
controller 1 to be synchronized with the rising edge of
the PLLIN signal.
FCB: Forced Continuous Control Input. This input acts
on both controllers and is normally used to regulate a
secondary winding. Pulling this pin below 0.8V will force
continuous synchronous operation.
ITH1, ITH2: Error Amplier Output and Switching Regu-
lator Compensation Point. Each associated channels’
current comparator trip point increases with this control
voltage.
SGND: Small Signal Ground. Common to both control-
lers, this pin must be routed separately from high cur-
rent grounds to the common (–) terminals of the COUT
capacitors.
NC: No Connect.
SENSE2, SENSE1: The (–) Input to the Differential Cur-
rent Comparators.
SENSE2+, SENSE1+: The (+) Input to the Differential Current
Comparators. The ITH pin voltage and controlled offsets
between the SENSEand SENSE+ pins in conjunction with
RSENSE set the current trip threshold.
RUN/SS2, RUN/SS1: Combination of soft-start, run control
inputs and short-circuit detection timers. A capacitor to
ground at each of these pins sets the ramp time to full
output current. Forcing either of these pins back below
1.0V causes the IC to shut down the circuitry required for
that particular controller. Latchoff overcurrent protection is
also invoked via this pin as described in the Applications
Information section.
TG2, TG1: High Current Gate Drives for Top N-Channel
MOSFETs. These are the outputs of oating drivers with
a voltage swing equal to INTVCC – 0.5V superimposed on
the switch node voltage SW.
SW2, SW1: Switch Node Connections to Inductors. Voltage
swing at these pins is from a Schottky diode (external)
voltage drop below ground to VIN.
BOOST2, BOOST1: Bootstrapped Supplies to the Top
Side Floating Drivers. Capacitors are connected between
the boost and switch pins and Schottky diodes are tied
between the boost and INTVCC pins. Voltage swing at the
boost pins is from INTVCC to (VIN + INTVCC).
BG2, BG1: High Current Gate Drives for Bottom (Synchro-
nous) N-Channel MOSFETs. Voltage swing at these pins
is from ground to INTVCC.
PGND: Driver Power Ground. Connects to the sources of
bottom (synchronous) N-channel MOSFETs, anodes of the
Schottky rectiers and the (–) terminal(s) of CIN.
INTVCC: Output of the Internal 5V Linear Low Dropout
Regulator and the EXTVCC Switch. The driver and control
circuits are powered from this voltage source. Must be
decoupled to power ground with a minimum of 4.7μF
tantalum or other low ESR capacitor.
EXTVCC: External Power Input to an Internal Switch Con-
nected to INTVCC. This switch closes and supplies VCC
power, bypassing the internal low dropout regulator, when-
ever EXTVCC is higher than 4.7V. See EXTVCC connection
in Applications section. Do not exceed 7V on this pin.
VIN: Main Supply Pin. A bypass capacitor should be tied
between this pin and the signal ground pin.
PGOOD: Open-Drain Logic Output. PGOOD is pulled to
ground when the voltage on either VOSENSE pin is not
within ±7.5% of its set point.
Exposed Pad: Signal Ground. Must be soldered to the PCB,
providing a local ground for the control components of
the IC, and be tied to the PGND pin under the IC.
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