參數(shù)資料
型號(hào): LTC2480IMS
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
封裝: PLASTIC, MSOP-10
文件頁數(shù): 2/40頁
文件大?。?/td> 601K
代理商: LTC2480IMS
10
LTC2480
2480fa
SDI (Pin 1): Serial Data Input. This pin is used to select the
GAIN, line frequency rejection, input, temperature sensor
and 2x speed mode. Data is shifted into the SDI pin on the
rising edge of serial clock (SCK).
VCC (Pin 2): Positive Supply Voltage. Bypass to GND
(Pin 8) with a 1
F tantalum capacitor in parallel with 0.1F
ceramic capacitor as close to the part as possible.
VREF (Pin 3): Positive Reference Input. The voltage on this
pin can have any value between 0.1V and VCC. The negative
reference input is GND (Pin 8).
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Offset Error vs VCC
(2x Speed Mode)
VCC (V)
2
2.5
0
OFFSET
ERROR
(
V)
100
250
3
4
4.5
2480 G41
50
200
150
3.5
5
5.5
VREF = 2.5V
VIN = 0V
VIN(CM) = GND
FO = GND
TA = 25°C
Offset Error vs VREF
(2x Speed Mode)
VREF (V)
0
OFFSET
ERROR
(
V)
190
200
210
3
5
2480 G42
180
170
160
12
4
220
230
240
VCC = 5V
VIN = 0V
VIN(CM) = GND
FO = GND
TA = 25°C
PSRR vs Frequency at VCC
(2x Speed Mode)
FREQUENCY AT VCC (Hz)
1
0
–20
–40
–60
–80
–100
–120
–140
1k
100k
2480 G43
10
100
10k
1M
REJECTION
(dB)
VCC = 4.1V DC
REF+ = 2.5V
REF= GND
IN+ = GND
IN= GND
FO = GND
TA = 25°C
PSRR vs Frequency at VCC
(2x Speed Mode)
FREQUENCY AT VCC (Hz)
0
–140
RREJECTION
(dB)
–120
–80
–60
–40
0
20
100
140
2480 G44
–100
–20
80
180
220
200
40 60
120
160
VCC = 4.1V DC ±1.4V
REF+ = 2.5V
REF= GND
IN+ = GND
IN= GND
FO = GND
TA = 25°C
PSRR vs Frequency at VCC
(2x Speed Mode)
FREQUENCY AT VCC (Hz)
30600
–60
–40
0
30750
2480 G45
–80
–100
30650
30700
30800
–120
–140
–20
REJECTION
(dB)
VCC = 4.1V DC ±0.7V
REF+ = 2.5V
REF= GND
IN+ = GND
IN= GND
FO = GND
TA = 25°C
UU
U
PI FU CTIO S
IN+ (Pin 4), IN(Pin 5): Differential Analog Inputs. The
voltage on these pins can have any value between GND –
0.3V and VCC + 0.3V. Within these limits the converter
bipolar input range (VIN = IN+ – IN) extends from – 0.5
VREF /GAIN to 0.5 VREF/GAIN. Outside this input range the
converter produces unique overrange and underrange
output codes.
CS (Pin 6): Active LOW Chip Select. A LOW on this pin
enables the digital input/output and wakes up the ADC.
Following each conversion the ADC automatically enters
the Sleep mode and remains in this low power state as long
相關(guān)PDF資料
PDF描述
LTC2480CMS#TR 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HDD#TRPBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HDD#PBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HMS#TRPBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HMS#PBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
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