參數(shù)資料
型號(hào)： LTC2480IMS
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
封裝： PLASTIC, MSOP-10
文件頁(yè)數(shù)： 10/40頁(yè)
文件大?。?/td> 601K
代理商： LTC2480IMS
18
LTC2480
2480fa
Table 5 summarizes the duration of each state and the
achievable output data rate as a function of FO.
Ease of Use
The LTC2480 data output has no latency, filter settling
delay or redundant data associated with the conversion
cycle. There is a one-to-one correspondence between the
conversion and the output data. Therefore, multiplexing
multiple analog voltages is easy.
The LTC2480 performs offset and full-scale calibrations
every conversion cycle. This calibration is transparent to
the user and has no effect on the cyclic operation described
above. The advantage of continuous calibration is extreme
stability of offset and full-scale readings with respect to time,
supply voltage change and temperature drift.
Power-Up Sequence
The LTC2480 automatically enters an internal reset state
when the power supply voltage VCC drops below approxi-
mately 2V. This feature guarantees the integrity of the
conversion result and of the serial interface mode selection.
When the VCC voltage rises above this critical threshold,
the converter creates an internal power-on-reset (POR)
signal with a duration of approximately 4ms. The POR
signal clears all internal registers. Following the POR
signal, the LTC2480 starts a normal conversion cycle and
follows the succession of states described in Figure 1. The
first conversion result following POR is accurate within the
specifications of the device if the power supply voltage is
restored within the operating range (2.7V to 5.5V) before
the end of the POR time interval.
On-Chip Temperature Sensor
The LTC2480 contains an on-chip PTAT (proportional to
absolute temperature) signal that can be used as a tem-
perature sensor. The internal PTAT has a typical value of
420mV at 27
°Candisproportionaltotheabsolutetempera-
ture value with a temperature coefficient of 420/(27 + 273)
= 1.40mV/
°C (SLOPE), as shown in Figure 4. The internal
PTAT signal is used in a single-ended mode referenced to
device ground internally. The GAIN is automatically set to
one (independent of the values of GS0, GS1, GS2) in order
to preserve the PTAT property at the ADC output code and
avoid an out of range error. The 1x speed mode with au-
tomatic offset calibration is automatically selected for the
internal PTAT signal measurement as well.
APPLICATIO S I FOR ATIO
WU
UU
Table 5. LTC2480 State Duration
STATE
OPERATING MODE
DURATION
CONVERT
Internal Oscillator
60Hz Rejection
133ms, Output Data Rate
≤ 7.5 Readings/s for 1x Speed Mode
67ms, Output Data Rate
≤ 15 Readings/s for 2x Speed Mode
50Hz Rejection
160ms, Output Data Rate
≤ 6.2 Readings/s for 1x Speed Mode
80ms, Output Data Rate
≤ 12.5 Readings/s for 2x Speed Mode
50Hz/60Hz Rejection
147ms, Output Data Rate
≤ 6.8 Readings/s for 1x Speed Mode
73.6ms, Output Data Rate
≤ 13.6 Readings/s for 2x Speed Mode
External Oscillator
FO = External Oscillator
41036/fEOSCs, Output Data Rate ≤ fEOSC/41036 Readings/s for
with Frequency fEOSC kHz
1x Speed Mode
(fEOSC/5120 Rejection)
20556/fEOSCs, Output Data Rate ≤ fEOSC/20556 Readings/s for
2x Speed Mode
SLEEP
As Long As CS = HIGH, After a Conversion is Complete
DATA OUTPUT
Internal Serial Clock
FO = LOW/HIGH
As Long As CS = LOW But Not Longer Than 0.62ms
(Internal Oscillator)
(24 SCK Cycles)
FO = External Oscillator with
As Long As CS = LOW But Not Longer Than 192/fEOSCms
Frequency fEOSC kHz
(24 SCK Cycles)
External Serial Clock with
As Long As CS = LOW But Not Longer Than 24/fSCKms
Frequency fSCK kHz
(24 SCK Cycles)
相關(guān)PDF資料
PDF描述
LTC2480CMS#TR 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HDD#TRPBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HDD#PBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HMS#TRPBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HMS#PBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
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