參數(shù)資料
型號: LTC2480IMS
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
封裝: PLASTIC, MSOP-10
文件頁數(shù): 11/40頁
文件大?。?/td> 601K
代理商: LTC2480IMS
19
LTC2480
2480fa
When using the internal temperature sensor, if the output
code is normalized to RSDO = VPTAT/VREF, the temperature
is calculated using the following formula:
T
RV
SLOPE
T
RV
SLOPE
K
SDO
REF
C
SDO
REF
=
in Kelvin
and
in C
273
where SLOPE is nominally 1.4mV/
°C.
Since the PTAT signal can have an initial value variation
which results in errors in SLOPE, to achieve better tem-
perature measurements, a one-time calibration is needed
to adjust the SLOPE value. The converter output of the
PTAT signal, R0SDO, is measured at a known temperature
T0 (in
°C) and the SLOPE is calculated as:
SLOPE
RV
T
SDO
REF
=
+
0
0 273
This calibrated SLOPE can be used to calculate the
temperature.
If the same VREF source is used during calibration and
temperature measurement, the actual value of the VREF is
not needed to measure the temperature as shown in the
calculation below:
T
RV
SLOPE
R
T
C
SDO
REF
SDO
=
=+
()
273
0
0 273
273
Reference Voltage Range
The LTC2480 external reference voltage range is 0.1V to
VCC. The converter output noise is determined by the
thermal noise of the front-end circuits, and as such, its
value in nanovolts is nearly constant with reference volt-
age. Since the transition noise (600nV) is much less than
the quantization noise (VREF/217), a decrease in the refer-
ence voltage will increase the converter resolution. A
reduced reference voltage will also improve the converter
performance when operated with an external conversion
clock (external FO signal) at substantially higher output
data rates (see the Output Data Rate section). VREF must
be
≥1.1V to use the internal temperature sensor.
The negative reference input to the converter is internally
tied to GND. GND (Pin 8) should be connected to a ground
plane through as short a trace as possible to minimize
voltage drop. The LTC2480 has an average operational
current of 160
A and for 0.1 parasitic resistance, the
voltage drop of 16
V causes a gain error of 3.2ppm for
VREF = 5V.
Input Voltage Range
The analog input is truly differential with an absolute/
common mode range for the IN+ and INinput pins
extending from GND – 0.3V to VCC + 0.3V. Outside
these limits, the ESD protection devices begin to turn on
and the errors due to input leakage current increase
rapidly. Within these limits, the LTC2480 converts the
bipolar differential input signal, VIN = IN+ – IN, from – FS
to +FS where FS = 0.5 VREF/GAIN. Outside this range, the
converter indicates the overrange or the underrange con-
dition using distinct output codes. Since the differential
input current cancellation does not rely on an on-chip
buffer, current cancellation as well as DC performance is
maintained rail-to-rail.
Input signals applied to IN+ and INpins may extend by
300mV below ground and above VCC. In order to limit any
fault current, resistors of up to 5k may be added in series
with the IN+ and INpins without affecting the perfor-
mance of the devices. The effect of the series resistance
on the converter accuracy can be evaluated from the
curves presented in the Input Current/Reference Current
sections. In addition, series resistors will introduce a
APPLICATIO S I FOR ATIO
WU
UU
Figure 4. Internal PTAT Signal vs Temperature
TEMPERATURE (
°C)
–60
V
PTAT
(mV)
500
600
120
2480 F04
400
200
30
090
–30
60
300
VCC = 5V
IM = 1
FO = GND
SLOPE = 1.40mV/
°C
相關(guān)PDF資料
PDF描述
LTC2480CMS#TR 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HDD#TRPBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HDD#PBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
LTC2480HMS#TRPBF 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
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