The LT5554 output power P
參數(shù)資料
型號(hào): LT5554IUH#PBF
廠商: Linear Technology
文件頁數(shù): 17/32頁
文件大?。?/td> 0K
描述: IC VGA DIG CONTROL 32-QFN
標(biāo)準(zhǔn)包裝: 73
應(yīng)用: 可變?cè)鲆妫╒GA)
電路數(shù): 1
-3db帶寬: 1GHz
電流 - 電源: 200mA
電壓 - 電源,單路/雙路(±): 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 32-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 管件
產(chǎn)品目錄頁面: 1322 (CN2011-ZH PDF)
LT5554
24
5554f
APPLICATIONS INFORMATION
Figure 17. Single Ended Test Board (Simplied Schematic)
The LT5554 output power POUT was obtained by adding
3dB for matching-loss and the transformer loss IL(T2) in
Table 3 to the board output power at J3 connector. The
transformer insertion loss (frequency and temperature
dependent) has been included in characterization.
The output power matching is required when LT5554
drives a 50Ω transmission line as shown on the evalua-
tion board.
When LT5554 drives local (on-board) loads such that
an ADC part, output power matching is not required and
OIP3 is dened based on POUT, total power at LT5554
open collector outputs.
Figure 17 shows the evaluation board for wide-band
characterization at ROUT = 50Ω, where the insertion loss
of the output balun is about –1dB at 1GHz. Several ROUT
options are given in Table 4 as well as the output padding
insertion-loss and required VCCO for 5V on LT5554 outputs.
The LT5554 output power at open collector outputs is:
POUT = PWR(J3) + IL(T2) + 3dB + ILPAD
Table 4. Balun Board ROUT Options
ROUT (Ω)
25
36
50
71
100
R3, R4 (Ω)
0
6.49
15.4
30.1
53.6
R5, R6 (Ω)
28.7
28
ILPAD
0
1.88
3.66
5.76
8.08
VCCO (V)
6.29
6.57
6.96
7.61
8.66
The differential-output board from Figure 18 was used
for ROUT = 50Ω wide-band characterization of the LT5554
single-ended outputs.
Both Figure 17 and Figure 18 boards VCCO was shifted
up with the voltage drop on R5, R6 produced by 45mA
output DC current such that OUT+, OUTDC bias voltage
is still 5V. The LT5554 part should be always enabled when
VCCO >6V. If disabled, the VCCO will be applied at OUT+,
OUTexceeding the absolute maximum 6V limit with
possible LT5554 failure.
T2
1:1
ETC1-1-13
IN+
IN
J1
50
J3
50
C5
1μF
LT5554
1, 3, 5, 7
9
5554 F17
OUT+
OUT
C9
0.1μF
C3
0.1μF
R6
28Ω
RO
400Ω
RIN
50Ω
RO
400Ω
RLOAD
57.1Ω
50Ω
MATCHING
C18
0.1μF
C19
4.7μF
C8
0.1μF
C4
0.1μF
11
VCC VDEC
ENB
13
PG0
15
PG1
17
PG2
19
PG3
21
PG4
23
PG5
25
PG6
27
STROBE
29
VPG
31
MODE
33, 35, 37, 38
2, 4, ...40
J5, 40 PINS
SMT-TB
VCCO
R20
10k
PG1
R21
10k
PG2
R22
10k
PG3
R23
10k
PG4
R24
10k
PG5
R25
10k
PG6
R26
10k
ROUT = 50Ω
R5
28Ω
R3
15.4Ω
R4
15.4Ω
VCC = 5V
VCCO = 7V
T1
1:1
ETC1-1-13
MACOM
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