參數(shù)資料
型號(hào): LT5554IUH#PBF
廠商: Linear Technology
文件頁(yè)數(shù): 10/32頁(yè)
文件大?。?/td> 0K
描述: IC VGA DIG CONTROL 32-QFN
標(biāo)準(zhǔn)包裝: 73
應(yīng)用: 可變?cè)鲆妫╒GA)
電路數(shù): 1
-3db帶寬: 1GHz
電流 - 電源: 200mA
電壓 - 電源,單路/雙路(±): 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 32-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1322 (CN2011-ZH PDF)
LT5554
18
5554f
APPLICATIONS INFORMATION
The PGx gain control inputs and STROBE input can be
congured to be either DC coupled or AC coupled depend-
ing on MODE pin level. The LT5554 gain control inputs
can be connected without external components to a wide
range of user control interfaces.
The LT5554 has internal overdrive protection circuitry.
The recovery time from a short duration (less than 5ns)
overdrive pulse is 5ns.
Input Interface
The DC voltage level at the IN+, INinputs are internally
biased to about 2V when the part is either enabled or
disabled. The best linearity performance is achieved when
an input imbalance is less than 2dB.
Two typical Input connection circuits are shown in Figures
3 and 4.
An input source with 50Ω (5%) is required for best gain
error performance.
This buffer is also connected to the input resistive attenua-
tor network. The DEC pin is a ‘virtual ground’ and typically
connected to an external capacitor CDEC (Figures 3 and
4). When CDEC is used, the LT5554 will have same input
attenuation for both differential mode and common mode
signals. The DEC pin de-coupling capacitor improves the
common mode AC performance even when the differential
IN+, INinputs are imbalanced by 3dB.
The DEC pin can be used as a voltage reference for external
circuitry when DC input coupling is desired.
Output Interface
The output interface must conduct the DC current of about
45mA to the amplier outputs (OUT+ OUT). Two interface
examples are shown in Figures 5 and 6.
A wide band ADC voltage interface is shown in Figure
5 where L1 and L2 are choke inductors. For a narrow
band application, a band pass lter can be placed at the
LT5554’s outputs.
Figure 3. Input Capacitively-Coupled to a Differential Source
Figure 4. Input Transformer-Coupled to Single-Ended Source
Figure 5. Differential Output Interface
Figure 6. Single-Ended Matched Output Interface
LT5554
VSRC
RSRC
50Ω
5554 F04
DEC
IN+
IN
OUT+
OUT
25Ω
CDEC
0.1μF
LT5554
5554 F03
DEC
IN+
IN
OUT+
OUT
C1
25Ω
C2
25Ω
CDEC
0.1μF
VSRC
RSRC/2
25Ω
RSRC/2
25Ω
LT5554
5554 F06
DEC
IN+
IN
OUT+
OUT
ZO
50Ω
C5
R6
205Ω
R5
205Ω
RO
400Ω
RO
400Ω
ROUT
100Ω
RLOAD
133Ω
VCCO
5V
MAX GAIN:
GV = 24dB
GP = 21dB
MAX GAIN INTO ZO:
GP = 18dB
T2
4:1
Decouple (DEC) Input
The DEC pin provides the DC voltage level for differential
inputs IN+, INvia an internal buffer, which is able to fast
charge/discharge the LT5554 input coupling capacitors
with about 30mA sourcing or sinking current capability.
LT5554
CHOKE
INDUCTORS
5554 F05
DEC
IN+
IN
OUT+
OUT
C5
C6
C4
C3
RO
400Ω
RO
400Ω
RSADC
100Ω
ROUT
100Ω
RLOAD
133Ω
VCCO
5V
L1
L2
MAX GAIN:
GV = 24dB
GP = 18dB
ADC
BIAS
R1
66.5Ω
R2
66.5Ω
ADC
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