參數資料
型號: LSIFC929X
英文描述: LSIFC929X dual channel fibre solutions
中文描述: LSIFC929X雙通道光纖解決方案
文件頁數: 39/144頁
文件大?。?/td> 1496K
代理商: LSIFC929X
Support Components
3-9
3.7 Support Components
The memory controller block within the LSIFC909 provides access to
external local memory resources required to manage FCP.
The following sections provide guidance in choosing the support
components necessary for a fully functional implementation using the
LSIFC909. A LSIFC909 typical implementation diagram is shown below
in
Figure 3.4
for reference.
Figure 3.4
LSIFC909 Typical Implementation
3.7.1 SSRAM Memory
The SSRAM memory stores a run time image of the LSIFC909 firmware.
This memory also stores data structures used by the LSIFC909 to
manage exchanges and transmit and receive queues.
The LSIFC909 uses a 32-bit nonmultiplexed memory bus to access the
SSRAM. This memory bus has the capability to address up to 4 Mbytes
of SSRAM.
The LSIFC909 firmware also supports optional byte wide parity error
detection. This option is configurable, and is specified as a serial
EEPROM parameter.
2
External
Transceiver
2
LSIFC909
Integrated
Transceiver
Memory
Controller
10
10
2
2
Serial
EEPROM
(2 Kbytes)
Flash
(1 Mbyte)
SSRAM
(1 Mbyte typ.)
Clock
(106 MHz)
32
PCI Bus
32/64
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