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參數(shù)資料
| 型號(hào)： | LPC47M112-MW |
| 廠(chǎng)商： | STANDARD MICROSYSTEMS CORP |
| 元件分類(lèi)： | 外設(shè)及接口 |
| 英文描述： | ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP100 |
| 封裝： | 14 X 20 MM, ROHS COMPLIANT, QFP-100 |
| 文件頁(yè)數(shù)： | 78/228頁(yè) |
| 文件大?。?/td> | 1269K |
| 代理商： | LPC47M112-MW |
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SMSC DS – LPC47M192
Page 78
Rev. 03/30/05
DATASHEET
2. This pin will remain low following a VCC POR until the TXD2 function is selected for the pin AND serial
port 2 is enabled by setting the activate bit, at which time the pin will reflect the state of the transmit
output of serial port 2. Following a VCC POR, setting the TXD2_MODE bit (bit 5 in Serial Port 2 Mode
Register, 0xF0 in Logical Device 5 Configuration Registers) to ‘1’ will change the state of the TXD2 pin
from low to tristate, regardless of the function selected on the pin (GPIO of TXD2), regardless of the
state of the activate bit for serial port 2 and regardless of the state of VCC. When VCC is removed from
the part while the TXD2_MODE bit is set to ‘1’, the TXD2 pin will remain tristate unless a VTR POR
occurs, which will reset the TXD2_MODE bit.
3. This pin will remain low following a VCC POR until the corresponding GPIO data bit (GP5 register bit 3)
is set or the polarity bit in the GP53 control register is set.
When Serial Port 2 is subsequently deactivated, the TXD2/IRTX pin will be driven low.
The TXD2_MODE bit is implemented for modems that do not assert the ring indicator pin when TXD2 is sensed low.
If required, this bit should be used as follows:
When the activate bit for serial port 2 is cleared prior to entering a sleep state, set the TXD2_MODE bit.
When the activate bit for serial port 2 is set, upon exiting a sleep state clear the TXD2_MODE bit.
The IRTX2 pin is not affected by the TXD2_MODE bit.
7.7 MPU-401 MIDI UART
7.7.1 OVERVIEW
Serial Port 3 is used exclusively in the LPC47M192 as an MPU-401-compatible MIDI Interface. The LPC47M192
MPU-401 hardware includes a Host Interface, an MPU-401 command controller, configuration registers, and a
compatible UART (FIGURE 2).
Each of these components are discussed in detail, below.
Only the MPU-401 UART (pass-through) mode is included in this implementation. MPU-401 UART mode is
supported on the Sound Blaster 16 Series-compatible MIDI hardware. The Sound Blaster 16 hardware is supported
by Microsoft Windows Operating Systems.
In MPU-401 UART mode, data is transferred without modification between the host and the MIDI device (UART).
Once UART mode is entered using the UART MODE command (3Fh), the only MPU-401 command that the interface
recognizes is RESET (FFh).
HOST
INTERFACE
IRQ
SA[15:0]
SD[7:0]
UART
MIDI_IN
MIDI_OUT
MPU-401
COMMAND
CONTROLLER
TX
RX
nIOR
nIOW
CONFIGURATION
REGISTERS
FIGURE 2 - MPU-401 MIDI INTERFACE
Note
: This figure is for illustration purposes only and is not intended to suggest specific implementation details.
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