參數(shù)資料
型號(hào): LPC3250FET296,551
廠商: NXP Semiconductors
文件頁(yè)數(shù): 8/57頁(yè)
文件大?。?/td> 0K
描述: IC ARM9 MCU 256K 296-TFBGA
特色產(chǎn)品: LPC32x0 ARM926EJ-S Processor
標(biāo)準(zhǔn)包裝: 126
系列: LPC3200
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 266MHz
連通性: EBI/EMI,以太網(wǎng),I²C,IrDA,Microwire,SPI,SSI,SSP,UART/USART,USB OTG
外圍設(shè)備: DMA,I²S,LCD,電機(jī)控制 PWM,PWM,WDT
輸入/輸出數(shù): 51
程序存儲(chǔ)器類型: ROMless
RAM 容量: 256K x 8
電壓 - 電源 (Vcc/Vdd): 0.9 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 3x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 296-TFBGA
包裝: 托盤
配用: 568-4743-ND - KIT LCD TOUCH 5.7" FOR LPC3250
568-4742-ND - MODULE DIMM LPC2478 ARM7
622-1030-ND - KIT LCD TOUCH 5.7" FOR LPC3250
其它名稱: 568-4533
935287084551
LPC3220_30_40_50
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 20 October 2011
16 of 79
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
GPO_22/
U7_HRTS/
LCDVD[14]
E10
VDD_IOD
O
General purpose output 22
O
HS UART 7 RTS out
O
LCD data bit 14 (LPC3230 and LPC3250 only)
GPO_23/
U2_HRTS/
U3_RTS
M16
VDD_IOA
O
General purpose output 23
OHS UART 2 RTS out
O
UART 3 RTS out
HIGHCORE/
LCDVD[17]
H16
VDD_IOD
O
Core voltage control out
O
LCD data bit 17 (LPC3230 and LPC3250 only)
I2C1_SCL
A5
VDD_IOB
I/O T
I2C1 serial clock input/output
I2C1_SDA
B6
VDD_IOB
I/O T
I2C1 serial data input/output
I2C2_SCL
A3
VDD_IOC
I/O T
I2C2 serial clock input/output
I2C2_SDA
E4
VDD_IOC
I/O T
I2C2 serial data input/output
I2S1TX_CLK/
MAT3[0]
A4
VDD_IOB
I/O
I2S1 transmit clock
O
Timer 3 match output 0
I2S1TX_SDA/
MAT3[1]
E7
VDD_IOB
I/O
I2S1 transmit data
O
Timer 3 match output 1
I2S1TX_WS/
CAP3[0]
B4
VDD_IOB
I/O
I2S1 transmit word select
I/O
Timer 3 capture input 0
JTAG_NTRST
H17
VDD_IOD
I: PU
JTAG1 reset input. Must be LOW during power-on
reset.
JTAG_RTCK
H18
VDD_IOD
O
JTAG1 return clock out
JTAG_TCK
H14
VDD_IOD
I
JTAG1 clock input
JTAG_TDI
J16
VDD_IOD
I: PU
JTAG1 data input
JTAG_TDO
J15
VDD_IOD
O
JTAG1 data out
JTAG_TMS
G18
VDD_IOD
I: PU
TAG1 test mode select input
KEY_COL0/
ENET_TX_CLK
F15
VDD_IOD
I
Keyscan column 0 input
I
Ethernet transmit clock (LPC3240 and LPC3250
only)
KEY_COL1/
ENET_RX_CLK/
ENET_REF_CLK
E16
VDD_IOD
I
Keyscan column 1 input
I
Ethernet receive clock (MII mode, LPC3240 and
LPC3250 only)
I
Ethernet reference clock (RMII mode, LPC3240 and
LPC3250 only)
KEY_COL2/
ENET_RX_ER
D17
VDD_IOD
I
Keyscan column 2 input
I
Ethernet receive error input (LPC3240 and
LPC3250 only)
KEY_COL3/
ENET_CRS
D18
VDD_IOD
I
Keyscan column 3 input
I
Ethernet carrier sense input (LPC3240 and
LPC3250 only)
KEY_COL4/
ENET_RXD0
G15
VDD_IOD
I
Keyscan column 4 input
I
Ethernet receive data 0 (LPC3240 and LPC3250
only)
Table 4.
Pin description …continued
Symbol
Pin
Power supply
domain
Type
Description
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