參數(shù)資料
型號(hào): LPC2212
廠商: NXP Semiconductors N.V.
英文描述: 16/32-bit ARM microcontrollers; 128/256 kB ISP/IAP Flash with 10-bit ADC and external memory interface
中文描述: 16/32位ARM微控制器; 128/256 kB ISP / IAP閃存的10位模數(shù)轉(zhuǎn)換器和外部存儲(chǔ)器接口
文件頁數(shù): 27/40頁
文件大?。?/td> 185K
代理商: LPC2212
Philips Semiconductors
LPC2212/LPC2214
16/32-bit ARM microcontrollers with external memory interface
Product data
Rev. 02 — 23 December 2004
27 of 40
9397 750 13149
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
interface peripherals residing on Port 0 are available during the development and
debugging phase as they are when the application is run in the embedded system
itself.
6.21.1
Embedded ICE
Standard ARM EmbeddedICE
logic provides on-chip debug support. The debugging
of the target system requires a host computer running the debugger software and an
EmbeddedICE protocol convertor. EmbeddedICE protocol convertor converts the
Remote Debug Protocol commands to the JTAG data needed to access the ARM
core.
The ARM core has a Debug Communication Channel function built-in. The debug
communication channel allows a program running on the target to communicate with
the host debugger or another separate host without stopping the program flow or
even entering the debug state. The debug communication channel is accessed as a
co-processor 14 by the program running on the ARM7TDMI-S core. The debug
communication channel allows the JTAG port to be used for sending and receiving
data without affecting the normal program flow. The debug communication channel
data and control registers are mapped in to addresses in the EmbeddedICE logic.
6.21.2
Embedded trace
Since the LPC2212/LPC2214 have significant amounts of on-chip memory, it is not
possible to determine how the processor core is operating simply by observing the
external pins. The Embedded Trace Macrocell provides real-time trace capability
for deeply embedded processor cores. It outputs information about processor
execution to the trace port.
The ETM is connected directly to the ARM core and not to the main AMBA system
bus. It compresses the trace information and exports it through a narrow trace port.
An external trace port analyzer must capture the trace information under software
debugger control. Instruction trace (or PC trace) shows the flow of execution of the
processor and provides a list of all the instructions that were executed. Instruction
trace is significantly compressed by only broadcasting branch addresses as well as a
set of status signals that indicate the pipeline status on a cycle by cycle basis. Trace
information generation can be controlled by selecting the trigger resource. Trigger
resources include address comparators, counters and sequencers. Since trace
information is compressed the software debugger requires a static image of the code
being executed. Self-modifying code can not be traced because of this restriction.
6.21.3
RealMonitor
RealMonitor is a configurable software module, developed by ARM Inc., which
enables real time debug. It is a lightweight debug monitor that runs in the background
while users debug their foreground application. It communicates with the host using
the DCC (Debug Communications Channel), which is present in the EmbeddedICE
logic. The LPC2212/LPC2214 contain a specific configuration of RealMonitor
software programmed into the on-chip Flash memory.
相關(guān)PDF資料
PDF描述
LPC2214 16/32-bit ARM microcontrollers; 128/256 kB ISP/IAP Flash with 10-bit ADC and external memory interface
LPC2220 16/32-bit ARM microcontrollers; flashless with 64 kB, with 10-bit ADC and external memory interface
LPC2364FB100 Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC
LPC2364 Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC
LPC2366 Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC
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