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參數(shù)資料
| 型號(hào)： | LPC1751FBD80 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Cortex-M3 with 32 kB flash, 8 kB SRAM, USB 2.0 Device, CAN, 12-bit ADC |
| 中文描述： | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT315-1, 80 PIN |
| 文件頁(yè)數(shù)： | 58/74頁(yè) |
| 文件大?。?/td> | 1572K |
| 代理商： | LPC1751FBD80 |
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LPC1759_58_56_54_52_51
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 29 March 2011
58 of 74
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
12. ADC electrical characteristics
[1]
The ADC is monotonic, there are no missing codes.
[2]
The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width. See
Figure 25
.
The integral non-linearity (E
L(adj)
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See
Figure 25
.
[3]
[4]
The offset error (E
O
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See
Figure 25
.
[5]
ADCOFFS value (bits 7:4) = 2 in the ADTRM register. See
LPC17xx user manual UM10360
.
[6]
The gain error (E
G
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See
Figure 25
.
[7]
The absolute error (E
T
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
ADC and the ideal transfer curve. See
Figure 25
.
[8]
See
Figure 26
.
[9]
The conversion frequency corresponds to the number of samples per second.
Fig 24. SPI slave timing (CPHA = 0)
SCK (CPOL = 0)
MOSI
MISO
002aad989
T
SPICYC
t
SPICLKH
t
SPICLKL
t
SPIDSU
t
SPIDH
t
SPIQV
DATA VALID
DATA VALID
t
SPIOH
SCK (CPOL = 1)
DATA VALID
DATA VALID
Table 17.
V
DDA
= 2.7 V to 3.6 V; T
amb
=
40
C to +85
C unless otherwise specified; ADC frequency 13 MHz; 12-bit resolution.
Symbol
Parameter
Conditions
V
IA
analog input voltage
C
ia
analog input capacitance
E
D
differential linearity error
E
L(adj)
integral non-linearity
E
O
offset error
E
G
gain error
E
T
absolute error
R
vsi
voltage source interface
resistance
f
clk(ADC)
ADC clock frequency
f
c(ADC)
ADC conversion frequency
ADC characteristics (full resolution)
Min
0
-
Typ
-
-
-
-
-
-
-
-
Max
V
DDA
15
1
3
2
0.5
4
7.5
Unit
V
pF
LSB
LSB
LSB
%
LSB
k
[1][2]
-
[3]
-
[4][5]
-
[6]
-
[7]
-
[8]
-
-
-
-
13
200
MHz
kHz
[9]
-
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| LPC1751FBD80,551 | 功能描述:ARM微控制器 - MCU ARM Cortex M3 Micro Controller RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC1751FBD80551 | 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 100MHZ LQFP-80 |
| LPC1752 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN |
| LPC1752FBD80 | 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM CORTEX M3 80LQFP 制造商:NXP Semiconductors 功能描述:MCU, 32BIT, ARM CORTEX M3, 80LQFP 制造商:NXP Semiconductors 功能描述:IC, 32BIT MCU, ARM CORTEX, 100MHZ LQFP80; Controller Family/Series:(ARM Cortex); Core Size:32bit; No. of I/O's:52; Supply Voltage Min:2.4V; Supply Voltage Max:3.6V; Digital IC Case Style:LQFP; No. of Pins:80; Program Memory Size:64KB;RoHS Compliant: Yes |
| LPC1752FBD80,551 | 功能描述:ARM微控制器 - MCU ARM Cortex M3 Micro Controller RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
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