參數(shù)資料
型號(hào): LPC1751FBD80
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Cortex-M3 with 32 kB flash, 8 kB SRAM, USB 2.0 Device, CAN, 12-bit ADC
中文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP80
封裝: 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT315-1, 80 PIN
文件頁(yè)數(shù): 35/74頁(yè)
文件大?。?/td> 1572K
代理商: LPC1751FBD80
LPC1759_58_56_54_52_51
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 29 March 2011
35 of 74
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
7.30.2
Brownout detection
The LPC1759/58/56/54/52/51 include 2-stage monitoring of the voltage on the
V
DD(REG)(3V3)
pins. If this voltage falls below 2.2 V, the BOD asserts an interrupt signal to
the Vectored Interrupt Controller. This signal can be enabled for interrupt in the Interrupt
Enable Register in the NVIC in order to cause a CPU interrupt; if not, software can monitor
the signal by reading a dedicated status register.
The second stage of low-voltage detection asserts reset to inactivate the
LPC1759/58/56/54/52/51 when the voltage on the V
DD(REG)(3V3)
pins falls below 1.85 V.
This reset prevents alteration of the flash as operation of the various elements of the chip
would otherwise become unreliable due to low voltage. The BOD circuit maintains this
reset down below 1 V, at which point the power-on reset circuitry maintains the overall
reset.
Both the 2.2 V and 1.85 V thresholds include some hysteresis. In normal operation, this
hysteresis allows the 2.2 V detection to reliably interrupt, or a regularly executed event
loop to sense the condition.
7.30.3
Code security (Code Read Protection - CRP)
1
This feature of the LPC1759/58/56/54/52/51 allows user to enable different levels of
security in the system so that access to the on-chip flash and use of the JTAG and ISP
can be restricted. When needed, CRP is invoked by programming a specific pattern into a
dedicated flash location. IAP commands are not affected by the CRP.
There are three levels of the Code Read Protection.
CRP1 disables access to chip via the JTAG and allows partial flash update (excluding
flash sector 0) using a limited set of the ISP commands. This mode is useful when CRP is
required and flash field updates are needed but all sectors can not be erased.
CRP2 disables access to chip via the JTAG and only allows full flash erase and update
using a reduced set of the ISP commands.
Running an application with level CRP3 selected fully disables any access to chip via the
JTAG pins and the ISP. This mode effectively disables ISP override using P2[10] pin, too.
It is up to the user’s application to provide (if needed) flash update mechanism using IAP
calls or call reinvoke ISP command to enable flash update via UART0.
7.30.4
APB interface
The APB peripherals are split into two separate APB buses in order to distribute the bus
bandwidth and thereby reducing stalls caused by contention between the CPU and the
GPDMA controller.
1.
LPC1751FBD80 with device ID 25001110 does not support CRP feature. LPC1751FBD80 with device ID 25001118 does support
CRP. See errata note in ES_LPC1751.
CAUTION
If level three Code Read Protection (CRP3) is selected, no future factory testing can be
performed on the device.
相關(guān)PDF資料
PDF描述
LPC2101FBD48 Single-chip 16-bit-32-bit microcontrollers; 8 kB-16 kB-32 kB flash with ISP-IAP, fast ports and 10-bit ADC
LPC2102FBD48 Single-chip 16-bit-32-bit microcontrollers; 8 kB-16 kB-32 kB flash with ISP-IAP, fast ports and 10-bit ADC
LPC2102FHN48 Single-chip 16-bit-32-bit microcontrollers; 8 kB-16 kB-32 kB flash with ISP-IAP, fast ports and 10-bit ADC
LPC2103FBD48 Single-chip 16-bit-32-bit microcontrollers; 8 kB-16 kB-32 kB flash with ISP-IAP, fast ports and 10-bit ADC
LPC2103FHN48 Single-chip 16-bit-32-bit microcontrollers; 8 kB-16 kB-32 kB flash with ISP-IAP, fast ports and 10-bit ADC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LPC1751FBD80,551 功能描述:ARM微控制器 - MCU ARM Cortex M3 Micro Controller RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LPC1751FBD80551 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 100MHZ LQFP-80
LPC1752 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
LPC1752FBD80 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM CORTEX M3 80LQFP 制造商:NXP Semiconductors 功能描述:MCU, 32BIT, ARM CORTEX M3, 80LQFP 制造商:NXP Semiconductors 功能描述:IC, 32BIT MCU, ARM CORTEX, 100MHZ LQFP80; Controller Family/Series:(ARM Cortex); Core Size:32bit; No. of I/O's:52; Supply Voltage Min:2.4V; Supply Voltage Max:3.6V; Digital IC Case Style:LQFP; No. of Pins:80; Program Memory Size:64KB;RoHS Compliant: Yes
LPC1752FBD80,551 功能描述:ARM微控制器 - MCU ARM Cortex M3 Micro Controller RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT