參數(shù)資料
型號: LP62S2048AM-55LLT
廠商: AMIC Technology Corporation
英文描述: 256K X 8 BIT LOW VOLTAGE CMOS SRAM
中文描述: 256K × 8位低電壓CMOS的SRAM
文件頁數(shù): 5/17頁
文件大小: 190K
代理商: LP62S2048AM-55LLT
LP62S2048A-T Series
PRELIMINARY
(June, 2002, Version 0.0)
5
AMIC Technology, Inc.
Absolute Maximum Ratings*
VCC to GND . . . . . . . .. . . . . . . . . . . . . -0.5V to + 4.6V
IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr . . . . . . . . -25
°
C to + 85
°
C
Storage Temperature, Tstg . . .. . . . . . . -55
°
C to + 125
°
C
Temperature Under Bias, Tbias .. . . . . . -10
°
C to + 85
°
C
Power Dissipation, P
T
. . . . . . . . . . . . . . . . . . . . . . 0.7W
Soldering Temp. & Time . . . . . . . . . . . . . 260
°
C, 10 sec
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
DC Electrical Characteristics
(T
A
= -25
°
C to + 85
°
C, VCC = 2.7V to 3.3V, GND = 0V)
Symbol
Parameter
LP62S2048A-55LLT
LP62S2048A-70LLT
Unit
Conditions
Min.
Max.
Min.
Max.
I
LI
Input Leakage Current
-
1
-
1
μ
A
V
IN
= GND to VCC
I
LO
Output Leakage Current
-
1
-
1
μ
A
CE1 = V
IH
or CE2 = V
IL
or OE = V
IH
or WE = V
IL
V
I/O
= GND to VCC
I
CC
Active Power Supply
Current
-
3
-
3
mA
CE1 = V
IL
, CE2 = V
IH
I
I/O
= 0mA
I
CC1
Dynamic Operating
Current
-
25
-
20
mA
Min. Cycle, Duty = 100%
CE1 = V
IL
, CE2 = V
IH
I
I/O
= 0mA
I
CC2
-
5
-
5
mA
CE1 = V
IL
, CE2 = V
IH
V
IH
= VCC, V
IL
= 0V
f = 1 MH
Z,
I
I/O
= 0mA
I
SB
-
0.5
-
0.5
mA
CE1 = V
IH
or CE2 =V
IL
I
SB1
Standby Power Supply
Current
-
10
-
10
μ
A
CE1
VCC - 0.2V
V
IN
0V
I
SB2
-
10
-
10
μ
A
CE2
0.2V
V
IN
0V
V
OL
Output Low Voltage
-
0.4
-
0.4
V
I
OL
= 2.1mA
V
OH
Output High Voltage
2.2
-
2.2
-
V
I
OH
= -1.0mA
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