參數(shù)資料
型號(hào): LMX2364TMX/NOPB
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 2600 MHz, PDSO24
封裝: TSSOP-24
文件頁(yè)數(shù): 23/39頁(yè)
文件大小: 694K
代理商: LMX2364TMX/NOPB
Pin Descriptions
Pin Number
Pin
Description
TSSOP
SLE
2
1
VccRF
RF PLL power supply voltage input. Must be equal to V
VccIF. May range from 2.7V to
5.5V. Bypass capacitors should be placed as close as possible to this pin and be
connected directly to the ground plane.
3
2
VcpRF
Power supply for RF charge pump. Must be
≥ V
VccRF and VVccIF.
4
3
CPoutRF
RF charge pump output.
5
4
GND
Ground for RF PLL digital circuitry.
6
5
FinRF
RF prescaler input. Small signal input from the VCO.
7
6
FinRF*
RF prescaler complementary input. For single-ended operation, a bypass capacitor
should be placed as close as possible to this pin and be connected directly to the
ground plane.
8
7
GND
Ground for RF PLL analog circuitry.
9
8
OSCinRF
RF R counter input. Has a V
CC/2 input threshold when configured as an input and can
be driven from an external CMOS or TTL logic gate.
10
9
OSCinIF
Oscillator input which can be configured to drive both the IF and RF R counter inputs
or only the IF R counter depending on the state of the OSC programming bit.
11
10
Ftest/LD
Programmable multiplexed output pin. Can function as general purpose CMOS
TRI-STATE I/O, analog lock detect output, digital filtered lock detect output, orN&R
divider output.
12
11
ENRF
RF PLL Enable. Powers down RF N and R counters, prescaler, and TRI-STATE
charge pump output when LOW, regardless of the state RF_PD bit. Bringing ENRF
high powers up RF PLL depending on the state of RF_PD control bit.
13
12
ENIF
IF PLL Enable. Powers down IF N and R counters, prescaler, and will TRI-STATE the
charge pump output when LOW, regardless of the state IF_PD bit. Bringing ENIF high
powers up IF PLL depending on the state of IF_PD control bit.
14
13
CLK
High impedance CMOS Clock input. Data for the control registers is clocked into the
24-bit shift register on the rising edge.
15
14
DATA
Binary serial data input. Data entered MSB first. The last three bits are the control
bits. High impedance CMOS input.
16
15
LE
Latch enable. High impedance CMOS input. Data stored in the shift register is loaded
into one of the 7 internal latches when LE goes HIGH.
17
16
GND
Ground for IF analog circuitry.
18
17
FinIF*
IF prescaler complementary input. For single-ended operation, a bypass capacitor
should be placed as close as possible to this pin and be connected directly to the
ground.
19
18
FinIF
IF prescaler input. Small signal input from the VCO.
20
19
GND
Ground for IF digital circuitry.
21
20
CPoutIF
IF charge pump output.
22
21
VcpIF
Power supply for IF charge pump. Must be
≥ V
VccRF and VVccIF.
23
22
VccIF
IF power supply voltage input. Must be equal to V
VccRF. Input may range from 2.7V to
5.5V. Bypass capacitors should be placed as close as possible to this pin and be
connected directly to the ground plane.
24
23
FLoutIF
IF FastLock Output. Also functions as Programmable TRI-STATE CMOS output.
1
24
FLoutRF
RF FastLock Output. Also functions as Programmable TRI-STATE CMOS output.
LMX2364
www.national.com
3
相關(guān)PDF資料
PDF描述
LMX2372MDC PLL FREQUENCY SYNTHESIZER, 1200 MHz, UUC
LMX2531LQ1500EX PLL FREQUENCY SYNTHESIZER, 80 MHz, QCC36
LMZ12003EXTTZX SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PSSO7
LMZ12003EXTTZ SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PSSO7
LMZ12003EXTTZE SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PSSO7
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LMX2370 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Dual Frequency Synthesizer for RF Personal Communications
LMX2370SLBX 功能描述:IC FREQ SYNTH DUAL 24LAMINATECSP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
LMX2370SLDX 功能描述:IC FREQ SYNTH DUAL 24LAMINATECSP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
LMX2370TM 功能描述:IC FREQ SYNTH DL 2.5GHZ 20TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
LMX2370TMX 功能描述:IC FREQ SYNTH DL 2.5GHZ 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*