參數(shù)資料
型號： LMK04031BEVAL/NOPB
廠商： National Semiconductor
文件頁數(shù)： 8/65頁
文件大小： 0K
描述： EVAL BOARD LMK04031BISQ
標(biāo)準(zhǔn)包裝： 1
系列： PowerWise®
主要目的： 計(jì)時(shí)，多用途
嵌入式： 否
已用 IC / 零件： LMK04031
已供物品： 板，線纜，文檔，軟件
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
Electrical Characteristics (continued)
(3.15 V
≤ VCC ≤ 3.45 V, -40 °C ≤ TA ≤ 85 °C. Typical values represent most likely parametric norms at VCC = 3.3 V, TA = 25
°C, at the Recommended Operating Conditions at the time of product characterization and are not guaranteed.)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
LMK040x0 (32)
BW = 12 kHz to 20 MHz
150
fCLKout = 250 MHz
BW = 100 Hz to 20 MHz
190
Integrated RMS Jitter
LMK040x1 (30)
BW = 12 kHz to 20 MHz
125
fCLKout = 250 MHz
BW = 100 Hz to 20 MHz
185
Integrated RMS Jitter
JCLKout
fs
LVCMOS
LMK040x2 (33)
BW = 12 kHz to 20 MHz
150
fCLKout = 250 MHz
BW = 100 Hz to 20 MHz
190
Integrated RMS Jitter
LMK040x3 (31)
BW = 12 kHz to 20 MHz
145
fCLKout = 250 MHz
BW = 100 Hz to 20 MHz
195
Integrated RMS Jitter
CLKout's Internal VCO Closed Loop Jitter Specifications using the Integrated Low Noise Crystal Oscillator Circuit
LMK040x0 (34)
BW = 12 kHz to 20 MHz
190
fCLKout = 245.76 MHz
BW = 100 Hz to 20 MHz
230
Integrated RMS Jitter
LMK040x1 (35)
BW = 12 kHz to 20 MHz
200
fCLKout = 245.76 MHz
BW = 100 Hz to 20 MHz
230
Integrated RMS Jitter
JCLKout
fs
LVPECL/2VPECL/LVDS
LMK040x2 (36)
BW = 12 kHz to 20 MHz
195
fCLKout = 245.76 MHz
BW = 100 Hz to 20 MHz
230
Integrated RMS Jitter
LMK040x3 (37)
BW = 12 kHz to 20 MHz
245
fCLKout = 245.76 MHz
BW = 100 Hz to 20 MHz
260
Integrated RMS Jitter
(32) For LMK040x0, FVCO = 1250 MHz. PLL1 parameters: FDET = 1 MHz, ICP1 = 100 A, loop bandwidth = 20 Hz. A 100 MHz VCXO drives
the OSCin input of PLL2. PLL2 parameters: VCO_DIV = 5, N2 = 5, R2 = 2, FDET = 50 MHz, ICP2 = 3.2 mA, C1 = 0 pF, C2 = 12 nF, R2
= 1.8 k
Ω, LBW = 254 kHz, PM = 81°. CLKDIST parameters: CLKoutX_DIV = Bypass, CLKout_DLY = OFF. VCXO phase noise: 100 Hz:
-100 dBc/Hz; 1 kHz: -128 dBc/Hz; 10 kHz: -144 dBc/Hz; 100 kHz: -147 dBc/Hz.
(33) For LMK040x2, FVCO = 1750 MHz. PLL1 parameters: FDET = 1 MHz, ICP1 = 100 A, loop bandwidth = 20 Hz. A 100 MHz VCXO drives
the OSCin input of PLL2. PLL2 parameters: VCO_DIV = 7, N2 = 5, R2 = 2, FDET = 50 MHz, ICP2 = 3.2 mA, C1 = 0 pF, C2 = 12 nF, R2
= 1.8 k
Ω, LBW = 360 kHz, PM = 79°. CLKDIST parameters: CLKoutX_DIV = Bypass, CLKout_DLY = OFF. VCXO phase noise: 100 Hz:
-100 dBc/Hz; 1 kHz: -128 dBc/Hz; 10 kHz: -144 dBc/Hz; 100 kHz: -147 dBc/Hz.
(34) For LMK040x0, FVCO = 1228.8 MHz. PLL1 parameters: FDET = 1.024 MHz, ICP1 = 100 A, loop bandwidth = 20 Hz. A 12.288 MHz
Vectron crystal (model: VXB1-1127-12M288000) and tuning circuitry is used with on-chip XO circuitry. PLL2 parameters: VCO_DIV = 5,
N2 = 10, EN_PLL2_REF2X = 1, FDET = 24.576 MHz, ICP2 = 3.2 mA, C1 = 0 pF, C2 = 12 nF, R2 = 1.8 kΩ, R3 = 600 Ω, R4 = 10 kΩ, C3
= 150 pF, C4 = 60 pF, LBW = 109 kHz, PM = 43°, CLKoutX_DIV = 2, CLKout_DLY = OFF.
(35) For LMK040x1, FVCO = 1474.56 MHz. PLL1 parameters: FDET = 1.024 MHz, ICP1 = 100 A, loop bandwidth = 20 Hz. A 12.288 MHz
Ecliptek crystal (model: ECX-6465) and tuning circuitry is used with on-chip XO circuitry. PLL2 parameters: VCO_DIV = 3, N2 = 20,
EN_PLL2_REF2X = 1, FDET = 24.576 MHz, ICP2 = 3.2 mA, C1 = 0 pF, C2 = 12 nF, R2 = 1.8 kΩ, R3 = 600 Ω, R4 = 10 kΩ, C3 = 150
pF, C4 = 60 pF, LBW = 103 kHz, PM = 44°, CLKoutX_DIV = 2, CLKout_DLY = OFF.
(36) For LMK040x2, FVCO = 1720.32 MHz. PLL1 parameters: FDET = 1.024 MHz, ICP1 = 100 A, loop bandwidth = 20 Hz. A 12.288 MHz
Vectron crystal (model: VXB1-1127-12M288000) and tuning circuitry is used with on-chip XO circuitry. PLL2 parameters: VCO_DIV = 7,
N2 = 10, EN_PLL2_REF2X = 1, FDET = 24.576 MHz, ICP2 = 3.2 mA, C1 = 0 pF, C2 = 12 nF, R2 = 1.8 kΩ, R3 = 600 Ω, R4 = 10 kΩ, C3
= 150 pF, C4 = 60 pF, LBW = 120 kHz, PM = 40°, CLKoutX_DIV = 2, CLKout_DLY = OFF.
(37) For LMK040x3, FVCO = 1966.08 MHz. PLL1 parameters: FDET = 1.024 MHz, ICP1 = 100 A, loop bandwidth = 20 Hz. A 12.288 MHz
Ecliptek crystal (model: ECX-6465) and tuning circuitry is used with on-chip XO circuitry. PLL2 parameters: VCO_DIV = 4, N2 = 20,
EN_PLL2_REF2X = 1, FDET = 24.576 MHz, ICP2 = 3.2 mA, C1 = 0 pF, C2 = 12 nF, R2 = 1.8 kΩ, R3 = 600 Ω, R4 = 10 kΩ, C3 = 150
pF, C4 = 60 pF, LBW = 91 kHz, PM = 47°, CLKoutX_DIV = 2, CLKout_DLY = OFF.
16
Copyright 2008–2011, Texas Instruments Incorporated
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LMK04031BEVALXO 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 LMK04031 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
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