參數資料
型號: LMK04031BEVAL/NOPB
廠商: National Semiconductor
文件頁數: 14/65頁
文件大?。?/td> 0K
描述: EVAL BOARD LMK04031BISQ
標準包裝: 1
系列: PowerWise®
主要目的: 計時,多用途
嵌入式:
已用 IC / 零件: LMK04031
已供物品: 板,線纜,文檔,軟件
FREQUENCY (MHz)
N
O
ISE
F
L
O
R
(d
Bc
/H
z
)
-130
-135
-140
-145
-150
-155
-160
-165
-170
10
100
1000
Delay = 0 ps
Delay = 450 ps
Delay = 1800 ps
Delay = 900 ps
Delay = 2100 ps
FREQUENCY (MHz)
N
O
ISE
F
L
O
R
(d
Bc
/H
z
)
-130
-135
-140
-145
-150
-155
-160
-165
-170
10
100
1000
LVCMOS
LVDS (differential)
LVPECL (differential)
FREQUENCY (MHz)
SI
N
G
L
E
-EN
D
ED
P-P
VO
L
T
AG
E
(V
)
5
4
3
2
1
0
100
200
300
400
500
No Load
47 pF Load
22 pF Load
10 pF Load
100 pF Load
FREQUENCY (MHz)
IC
C
(mA)
40
35
30
25
20
15
10
5
0
50
100 150 200 250 300 350 400
FREQUENCY (MHz)
D
IF
F
ER
EN
T
IAL
P-P
VO
L
T
AG
E
(V
)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
300
600
900
1.2k
1.5k
1.8k
FREQUENCY (MHz)
D
IF
F
ER
EN
T
IAL
P-P
VO
L
T
AG
E
(V
)
2.5
2.0
1.5
1.0
0.5
0.0
0
400
800
1.2k
1.6k
2k
NORMAL Mode
LV2PECL Mode
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
Typical Performance Characteristics
Clock Output AC Characteristics
LVDS VOD
LVPECL VOD
vs.
Frequency
Figure 2.
Figure 3.
LVCMOS Vpp
vs.
Typical Dynamic ICC, LVCMOS Driver, VCC = 3.3 V,
Frequency
Temp = 25 °C, CL= 5 pF
Figure 4.
Figure 5.
Clock Channel Delay Noise Floor
Clock Output Noise Floor
vs.
Frequency
Figure 6.
Figure 7.
To estimate this noise, only the output frequency is required. Divide value and input frequency are not relevant.
Copyright 2008–2011, Texas Instruments Incorporated
21
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