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參數(shù)資料
| 型號： | LM12434CIV |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Sign Data Acquisition System with Serial I/O and Self-Calibration |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 73/80頁 |
| 文件大?。?/td> | 1561K |
| 代理商： | LM12434CIV |
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8.0 Analog Considerations
8.1 REFERENCE VOLTAGE
The difference between the voltages applied to the V
REF
a
and V
REF
b
is the analog input voltage span (the difference
between the voltages applied across two multiplexer inputs
or the voltage applied to one of the multiplexer inputs and
analog ground, over which 4095 positive and 4096 negative
codes exist). The voltage sources driving V
REF
a
or V
REF
b
must have very low output impedance and noise. The circuit
inFigure 19 is an example of a very stable reference appro-
priate for use with the LM12434 and LM12
à
L
ó
438.
The ADC can be used in either ratiometric or absolute refer-
ence applications. In ratiometric systems, the analog input
voltage is proportional to the voltage used for the ADC’s
reference voltage. When this voltage is the system power
supply, the V
REF
a
pin is connected to V
A
a
and V
REF
b
is
connected to GND. This technique relaxes the system refer-
ence stability requirements because the analog input volt-
age and the ADC reference voltage move together. This
maintains the same output code for given input conditions.
For absolute accuracy, where the analog input voltage var-
ies between very specific voltage limits, a time and tempera-
ture stable voltage source can be connected to the refer-
ence inputs. Typically, the reference voltage’s magnitude
will require an initial adjustment to null reference voltage
induced full-scale errors.
8.2 INPUT RANGE
The LM12434 and LM12
à
L
ó
438’s fully differential ADC and
reference voltage inputs generate a two’s-complement out-
put that is found by using the equation below.
V
IN
a
b
V
IN
b
V
REF
a
b
V
REF
b
(4096)
b
(/2
output code
e
(12-bit)
output code
e
V
IN
a
b
V
IN
b
V
REF
a
b
V
REF
b
(256)
b
(/2
(8-bit)
Round up to the next integer value between
b
4096 to 4095
for 12-bit resolution and between
b
256 to 255 for 8-bit res-
olution if the result of the above equation is not a whole
number. As an example, V
REF
a
e
2.5V, V
REF
b
e
1V,
V
IN
a
e
1.5V and V
IN
b
e
GND. The 12-bit
a
sign output
code is positive full-scale, or 0,1111,1111,1111. If V
REF
a
e
5V, V
REF
b
e
1V, V
IN
a
e
3V, and V
IN
b
e
GND, the
12-bit
a
sign output code is 0,1100,0000,0000.
8.3 INPUT CURRENT
A charging current flows into or out of (depending on the
input voltage polarity) the analog input pins, IN0–IN7 at the
start of the analog input acquisition time (t
ACQ
). This cur-
rent’s peak value will depend on the actual input voltage
applied.
8.4 INPUT SOURCE RESISTANCE
For low impedance voltage sources (
k
60
X
for 8 MHz oper-
ation), the input charging current will decay, before the end
of the S/H’s acquisition time, to a value that will not intro-
duce any conversion errors. For higher source impedances,
the S/H’s acquisition time can be increased. As an exam-
ple, operating with a 8 MHz clock frequency and maximum
acquisition time, the LM12434 and LM12438’s analog inputs
can handle source impedances as high as 4.17 k
X
. Refer to
Section 6.2.1, Instruction RAM ‘‘00’’, Bits 12–15 for further
information.
8.5 INPUT BYPASS CAPACITANCE
External capacitors (0.01
m
F–0.1
m
F) can be connected be-
tween the analog input pins, IN0–IN7, and analog ground to
filter any noise caused by inductive pickup associated with
long input leads. These capacitors will not degrade the con-
version accuracy.
8.6 INPUT NOISE
The leads to each of the analog multiplexer input pins
should be kept as short as possible. This will minimize input
noise and clock frequency coupling that can cause conver-
sion errors. Input filtering can be used to reduce the effects
of the noise sources.
8.7 POWER SUPPLY CONSIDERATIONS
Decoupling and bypassing the power supply on a high reso-
lution ADC is an important design task. Noise spikes on the
V
A
a
(analog supply) or V
D
a
(digital supply) can cause
conversion errors. The analog comparator used in the ADC
will respond to power supply noise and will make erroneous
conversion decisions. The DAS is especially sensitive to
power supply spikes that occur during the auto-zero or lin-
earity calibration cycles.
*
Tantalum
**
Ceramic
TL/H/11879–20
FIGURE 19. Low Drift Extremely Stable Reference Circuit
73
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