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參數(shù)資料
| 型號(hào)： | LH540205 |
| 廠商： | Sharp Corporation |
| 英文描述： | CMOS 8192 x 9 Asynchronous FIFO |
| 中文描述： | 8192 × 9的CMOS異步FIFO |
| 文件頁(yè)數(shù)： | 10/17頁(yè) |
| 文件大?。?/td> | 136K |
| 代理商： | LH540205 |
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AC ELECTRICAL CHARACTERISTICS
1
(Over Operating Range)
SYMBOL
PARAMETER
t
A
= 20 ns
MIN
t
A
= 25 ns
MIN
t
A
= 35 ns
MIN
t
A
= 50 ns
MIN
UNIT
MAX
MAX
MAX
MAX
READ CYCLE TIMING
30
–
–
20
10
–
20
–
5
–
10
–
t
RC
t
A
t
RR
t
RPW
t
RLZ
t
WLZ
Read Cycle Time
Access Time
Read Recovery Time
Read Pulse Width
2
Data Bus Active from Read LOW
3
Data Bus Active from Write HIGH
3,4
Data Held Valid from Read Pulse
HIGH
Data Bus High-Z from Read HIGH
3
35
–
10
25
5
10
–
45
–
10
35
5
10
–
65
–
15
50
5
10
–
ns
ns
ns
ns
ns
ns
25
–
–
–
–
35
–
–
–
–
50
–
–
–
–
t
DV
5
–
5
–
5
–
5
–
ns
t
RHZ
–
15
–
15
–
15
–
20
ns
WRITE CYCLE TIMING
30
–
20
–
10
–
12
–
0
–
t
WC
t
WPW
t
WR
t
DS
t
DH
Write Cycle Time
Write Pulse Width
2
Write Recovery Time
Data Setup Time
Data Hold Time
35
25
10
15
0
–
–
–
–
–
45
35
10
18
0
–
–
–
–
–
65
50
15
30
0
–
–
–
–
–
ns
ns
ns
ns
ns
RESET TIMING
30
20
10
20
20
RETRANSMIT TIMING
5
30
–
20
–
10
–
t
RSC
t
RS
t
RSR
t
RRSS
t
WRSS
Reset Cycle Time
Reset Pulse Width
2
Reset Recovery Time
Read HIGH to RS HIGH
Write HIGH to RS HIGH
–
–
–
–
–
35
25
10
25
25
–
–
–
–
–
45
35
10
35
35
–
–
–
–
–
65
50
15
50
50
–
–
–
–
–
ns
ns
ns
ns
ns
t
RTC
t
RT
t
RTR
Retransmit Cycle Time
Retransmit Pulse Width
2
Retransmit Recovery Time
35
25
10
–
–
–
45
35
10
–
–
–
65
50
15
–
–
–
ns
ns
ns
FLAG TIMING
30
t
EFL
Reset LOW to Empty Flag LOW
Reset LOW to Half-Full and Full
Flags HIGH
Read LOW to Empty Flag LOW
Read HIGH to Full Flag HIGH
Write HIGH to Empty Flag HIGH
Write LOW to Full Flag LOW
Write LOW to Half-Full Flag LOW
Read HIGH to Half-Full Flag HIGH
–
–
35
–
45
–
65
ns
t
HFH,FFH
–
30
–
35
–
45
–
65
ns
t
REF
t
RFF
t
WEF
t
WFF
t
WHF
t
RHF
–
–
–
–
–
–
20
20
20
20
20
20
–
–
–
–
–
–
25
25
25
25
25
25
–
–
–
–
–
–
35
35
35
35
35
35
–
–
–
–
–
–
45
45
45
45
45
45
ns
ns
ns
ns
ns
ns
EXPANSION TIMING
–
20
–
20
20
–
10
–
10
–
t
XOL
t
XOH
t
XI
t
XIR
t
XIS
Expansion Out LOW
Expansion Out HIGH
Expansion In Pulse Width
Expansion In Recovery Time
Expansion in Setup Time
–
–
25
25
–
–
–
–
–
35
35
–
–
–
–
–
50
50
–
–
–
ns
ns
ns
ns
ns
25
10
10
35
10
15
50
10
15
NOTES:
1.
All timing measurements are performed at ‘AC Test Condition’ levels.
2.
Pulse widths less than minimum value are not allowed.
LH540205
CMOS 8192
×
9 Asynchronous FIFO
10
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH540205-20 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540205-25 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540205-35 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540205-50 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540205-65 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x9 Asynchronous FIFO |
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