LC87F74C8A
No.7825-16/21
Continued from preceding page.
Limits
Parameter
Symbol
Pins
Conditions
VDD [V]
min
typ
max
unit
IDDHALT(5)
4.5 to 5.5
600
1600
IDDHALT(6)
HALT mode
FmCF = 0Hz (Oscillation stop)
FsX’tal = 32.768kHz crystal oscillation
System clock : RC oscillation
Frequency variable RC oscillation stopped
Divider : 1/2
3.0 to 4.5
350
1300
IDDHALT(7)
4.5 to 5.5
1500
3600
IDDHALT(8)
HALT mode
FmCF = 0Hz (No oscillation)
FsX’tal = 32.768kHz crystal oscillation
Internal RC oscillation stopped.
System clock : 1MHz with frequency variable
RC oscillation
Divider : 1/2
3.0 to 4.5
1250
3300
IDDHALT(9)
4.5 to 5.5
25
100
Current
consumption
during HALT
mode
(Note 4)
IDDHALT(10)
VDD1 =
VDD2 =
VDD3
HALT mode
FmCF = 0Hz (Oscillation stop)
FsX’tal = 32.768kHz crystal oscillation
System clock : 32.768kHz
Internal RC oscillation stopped.
Frequency variable RC oscillation stopped
Divider : 1/2
3.0 to 4.5
12
60
μA
IDDHOLD(1)
4.5 to 5.5
0.1
25
Current
consumption
during HOLD
mode
IDDHOLD(2)
VDD1
HOLD mode
CF1 = VDD or open
(when using external clock)
3.0 to 4.5
0.03
20
IDDHOLD(3)
4.5 to 5.5
20
90
Current
consumption
during
Date/time clock
HOLD mode
Note 4 : The currents through the output transistors and the pull-up MOS transistors are ignored.
F-ROM Write Characteristics
/ Ta = +10°C to +55°C, VSS1 = VSS2 = VSS3 = 0V
IDDHOLD(4)
VDD1
Date/time clock
HOLD mode
CF1 = VDD or open
(when using external clock)
FmX’tal = 32.768kHz crystal oscillation
3.0 to 4.5
8
50
μA
Limits
Parameter
Symbol
Pins
Conditions
VDD [V]
min
typ
max
unit
On-board write
current
IDDF(1)
VDD1
128-byte write
Including erase current
4.5 to 5.5
30
65
mA
Write cycle time
tFW(1)
128-byte write
Including erase current
Not including time to prepare 128-byte data
4.5 to 5.5
6.3
9
mS
Main System Clock Oscillation Circuit Characteristics
The characteristics in the table bellow is based on the following conditions :
1. Use the standard evaluation board SANYO has provided.
2. Use the peripheral parts with indicated value externally.
3. The peripheral parts value is a recommended value of oscillator manufacturer
Table 1. Main system clock oscillation circuit characteristics using ceramic resonator
Circuit parameters
Oscillation
stabilizing time
Frequency
Manufacturer
Oscillator
C1
[pF]
C2
[pF]
Rd1
[
]
Operating
supply voltage
range
[V]
typ
[mS]
max
[mS]
Notes
CSTCE10M0G52-R0
(10)
(10)
220
4.5 to 5.5
0.05
0.15
Built-in C1, C2
10MHz
Murata
CSTLS10M0G53-B0
(10)
(10)
220
4.5 to 5.5
0.05
0.15
Built-in C1, C2
CSTCR4M00G53-R0
(15)
(15)
1k
3.0 to 5.5
0.05
0.15
Built-in C1, C2
4MHz
Murata
CSTLS4M00G53-B0
(15)
(15)
470
3.0 to 5.5
0.05
0.15
Built-in C1, C2
The oscillation stabilizing time is a period until the oscillation becomes stable after VDD becomes higher than
minimum operating voltage. (Refer to Figure 4)