參數(shù)資料
型號(hào)： LC87F57C8A
廠商： Sanyo Electric Co.,Ltd.
英文描述： 8 BIT SINGLE CHIP MICROCONTROLLER
中文描述： 8位單片機(jī)
文件頁(yè)數(shù)： 18/28頁(yè)
文件大?。?/td> 336K
代理商： LC87F57C8A
LC87F57C8A
18/27
Ver.1.00
5. Parallel Input/Output Characteristics
/ Ta=-20°C to +70°C, VSS1=VSS2=VSS3=0V
Note: If Port A terminals will be used as RS, WR , RD or CS, then it should be set to CMOS format by
option data. Refer to figures 8 and 9 for parallel output timing.
Limits
min.
Parameter
Symbol
Pins
Conditions
VDD[V]
2.5 - 5.5
typ.
1
max.
unit
tCYC
Write cycle,
Read cycle
Address set-up
time
tC(1)
tsA(1)
WR
(PA3), PB0-PB7
RD
(PA4), PC0-PC7
RD
(PA4), PC0-PC7
2.5 - 5.5
1/3tCYC
-30ns
tsA(2)
From address set-up
until control signal
changes
2.5 - 5.5
2/3tCYC
-30ns
1/6tCYC
5
thA(1)
RD
(PA4), PC0-PC7
From change of
RD
until address change
From change of
WR
until address change
From change of RS,
CS
until change in
WR
from change of RS
until change in
RD
2.5 - 5.5
tCYC
& ns
Address hold
time
thA(2)
WR
(PA3), PC0-PC7
2.5 - 5.5
ns
tsRS(1)
WR
(PA3), RS(PA5),
CS
(PAX)
2.5 - 5.5
1/6tCYC
-15ns
tsRS(2)
RD
(PA4), RS(PA5)
2.5 - 5.5
1/6tCYC
-15ns
1/3tCYC
-15ns
1/3tCYC
-15ns
RS set-up time
tsRS(3)
RD
(PA4), RS(PA5)
2.5 - 5.5
tsCS(1)
RD
(PA4),
CS
(PAX) From change in
CS
until change in
RD
2.5 - 5.5
CS
set-up time
tsCS(2)
WR
(PA3),
CS
(PAX) From change in
CS
until change in
WR
From change in
WR
until change in RS
From change in
RD
until change in RS,
CS
2.5 - 5.5
2/3tCYC
-15ns
tCYC
& ns
thRS(1)
WR
(PA3), RS(PA5)
2.5 - 5.5
0
ns
thRS(2)
RD
(PA4), RS(PA5),
CS
(PAX)
RD
(PA4), RS(PA5),
CS
(PAX)
RD
(PA4), RS(PA5)
2.5 - 5.5
1/6tCYC
tCYC
& ns
RS
hold time
thRS(3)
2.5 - 5.5
0
ns
thCS(1)
From change in
RD
until change in
CS
From change in
WR
until change in
CS
2.5 - 5.5
1/6tCYC
tCYC
& ns
CS
hold time
thCS(2)
WR
(PA3), RS(PA5)
2.5 - 5.5
0
ns
tWRH(1)
WR
(PA3)
2.5 - 5.5
1/6tCYC
-5ns
2/3tCYC
-5ns
1/6tCYC
-5ns
1/3tCYC
-5ns
1/6
tCYC
2/3
tCYC
1/6
tCYC
1/3
tCYC
WR
’H’ pulse width
tWRH(2)
WR
(PA3)
2.5 - 5.5
tWRL(1)
WR
(PA3)
2.5 - 5.5
WR
’L’ pulse width
tWRL(2)
WR
(PA3)
2.5 - 5.5
tCYC
& ns
(Continued)
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