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參數(shù)資料
| 型號： | LC87F57C8A |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 8 BIT SINGLE CHIP MICROCONTROLLER |
| 中文描述： | 8位單片機(jī) |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 336K |
| 代理商： | LC87F57C8A |
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LC87F57C8A
Ver.1.00
11/27
Port Output Configuration
Output configuration and pull-up resistor options are shown in the following table.
Input is possible even when a port is in output mode.
Terminal
Option
applies to:
each bit
Option
Output Format
Pull-up resistor
1
2
1
2
1
2
CMOS
Nch-open drain
CMOS
Nch-open drain
CMOS
Nch-open drain
Programmable (Note 1)
None
Programmable
Programmable
Programmable
Programmable
P00 - P07
P10 - P17
P20 - P27
PA2 - PA5
PB0 - PB7(*)
PC0 - PC7
P70
P71 - P73
P80 - P82
PWM0, PWM1
XT1
XT2
Note 1 Programmable pull-up resistor of Port 0 is specified in nibble units (P00 - P03, P04 - P07).
(*) When in parallel interface mode, PB0 - PB7 output format is CMOS, regardless of any selected option.
Note:
To reduce VDD signal noise and to increase the duration of the backup battery supply, VSS1, VSS2,
and VSS3 should connect to each other and they should also be grounded.
Example 1 : During backup in hold mode, port output ‘H’ level is supplied from the back-up capacitor.
each bit
each bit
-
-
-
-
-
-
None
None
None
None
None
None
Nch-open drain
CMOS
Nch-open drain
CMOS
Input only
Output for 32.768kHz crystal oscillation
Programmable
Programmable
None
None
None
None
VSS1 VSS2 VSS3
VDD1
VDD2
VDD3
Power
Supply
Back-up
capacitor
LSI
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