參數(shù)資料
型號(hào)： LC72714
廠商： Sanyo Electric Co.,Ltd.
英文描述： Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder
中文描述： 多重移動(dòng)調(diào)頻廣播集成電路片VICS解碼器
文件頁(yè)數(shù)： 15/29頁(yè)
文件大小： 232K
代理商： LC72714
No. 6871-15/29
LC72714W
t
EL
t
EH
t
ES
tCL
t
CRC
t
CH
t
HD
t
SU
A3
N
N-1
N-2
CR2
CR1
CR0
A2
A1
A0
B3
B2
B1
B0
DI
CL
CE
CRC4 pin output after N items
have been transferred.
Note: The number of items, N, refers to
the number of 8-bit items.
CRC4 pin output
Structure of the Post-Correction Output Data <CCB Interface>
Post-error correction data can be output by using CCB address #FB. Although there are up to 288 bits of valid data that
can be output, it is possible to stop clock input (CL input) and set CE to the low level, and output the remaining data on
the next interrupt with no harmful effects whatsoever.
The maximum amount of data that can be output is 288 bits (36 bytes), and the contents of the status register (STAT)
and the block number register (BLNO) are added as the first two bytes.
The contents of the STAT and BLNO registers are output LSB first.
The post-correction data is output in order starting with the first bit in each single block of data.
The BIC code is not output.
The values of the output data are not guaranteed if multiple data read operations are performed for a single interrupt
signal (INT).
Layer 4 CRC Check Circuit <CCB Interface>
The basic outline of this operation is the same as that described in the Layer 4 CRC Detection Circuit <Parallel
Interface> section earlier in this document. The data group data used for this error detection operation is sent to the IC
using the CCB interface. The value #FC is used as the CCB address.
The data group data is transferred in 8-bit units. There is no upper limit on the amount of data that can be transferred (the
value N in the figure below), and the data transfer may be divided into multiple operations.
STAT (8 bits)
BLNO (8 bits)
Data section (176 bits) Post-error correction data
Layer 2 CRC (14 bits)
Parity (82 bits)
DO0 to DO7
DO8 to DO15
DO16 to DO191
DO192 to DO205
DO206 to DO287
t
EL
t
DDO
t
ES
t
CL
t
CH
t
HD
t
SU
A3
BLN7
BLN6
BLN5
ST2
ST1
ST0
A2
A1
A0
B3
B2
B1
B0
DI
DO
CL
CE
Register Output
The IC internal status and block number registers are special-purpose registers that can be read out by applications. (See
the discussion of the read register data update timing on page 12.)
The application inputs the CCB address #FD to DI. The status register data is output first followed by the block number
register data.
相關(guān)PDF資料
PDF描述
LC72714W Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder
LC72720NM Single-Chip RDS Signal-Processing System LSI(單片無(wú)線電數(shù)據(jù)系統(tǒng)信號(hào)處理LSI（大規(guī)模集成電路）)
LC72720YV Single-Chip RDS Signal-Processing System IC(單片無(wú)線電數(shù)據(jù)系統(tǒng)信號(hào)處理芯片)
LC72720 Single-Chip RDS Signal-Processing System LSI
LC72720M Single-Chip RDS Signal-Processing System LSI
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LC72714W 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder
LC72715PW 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:CMOS IC Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder
LC72717PW 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast (DARC) Receiver IC
LC72720 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip RDS Signal-Processing System LSI
LC72720M 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip RDS Signal-Processing System LSI
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*