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參數(shù)資料
| 型號： | LC573102A |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 4-bit Single Chip Microcontroller |
| 中文描述： | 4位單片微控制器 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 181K |
| 代理商： | LC573102A |
LC573104A, 573102A
No.4144–13/16
Continued from preceding page.
I
B
C
Mnemonic
Instruction code
Function
Status
flag
affected
Function description
D
F
D
S
SDPL
0 0 0 1
1 1 0 0
DPL
←
(AC)
1
1
AC contents loaded to DPL.
SDPH
0 0 0 1
1 1 0 1
DPH
←
(AC)
1
1
AC contents loaded to DPH.
LDPL
1 1 1 1
1 1 0 1
AC
←
(DPL)
1
1
DPL contents loaded to AC.
LDPH
1 1 1 1
1 1 1 0
AC
←
(DPH)
1
1
DPH contents loaded to AC.
MDPL X
1 0 1 1
X3X2X1X0DPL
←
X
1
1
Immediate data X loaded to DPL.
MDPH X
1 1 0 0
X3X2X1X0DPH
←
X
1
1
Immediate data X loaded to DPH.
EDPL
0 0 0 1
1 1 1 0
(DPL)
(EDPL)
1
1
DPL and EDPL contents exchanged.
EDPH
0 0 0 1
1 1 1 1
(DPH)
(EDPH)
1
1
DPH and EDPH contents exchanged.
IDPL
1 0 0 1
1 0 1 0
DPL
←
(DPL)+1
1
1
DPL contents incremented +1.
IDPH
1 0 0 1
1 1 0 0
DPH
←
(DPH)+1
1
1
DPH contents incremented +1.
DDPL
1 0 0 1
1 0 1 1
DPL
←
(DPL)–1
1
1
DPL contents decremented –1.
DSP
1 0 0 1
1 1 1 1
SP
←
(SP)–1
1
1
SP contents decremented –1.
SC5
0 0 0 0
0 1 1 1
HEF0
←
1
1
1
HEF0 set enabling overflow from the divider circuit to release the Halt mode.
LDA
1 0 1 0
1 0 0 1
AC
←
[M (DP)]
1
1
Memory M (DP) contents transferred to AC.
MVI X
0 0 1 0
X3X2X1X0M (DP)
←
X
1
1
Immediate data X loaded to memory M (DP).
LSP
1 0 1 0
1 0 1 0
AC
←
(SP)
1
1
SP contents loaded to AC.
CSTF
CSTF
CSP
0 0 0 0
0 1 0 0
CSTF
←
0
1
1
CSTF reset.
DDPH
1 0 0 1
1 1 0 1
DPH
←
(DPH)–1
1
1
DPH contents decremented –1.
SCF1 to
SCF4
LHLT
1 0 1 0
1 0 1 1
AC
←
(STS2), STS2
←
0
1
1
STS2 contents loaded to AC and STS2 is reset.
SCF0
HEF0
CF
CF
HEF0
L500
1 0 1 0
1 1 0 0
AC
←
(STS1), SCF0
←
0
1
1
STS1 contents loaded to AC and SCF0 is reset.
MSP X
1 1 1 0
X3X2X1X0SP
←
X
1
1
Immediate data X loaded to SP.
CST
0 0 0 0
0 1 0 1
CSTF
←
1
1
1
CSTF set.
RCF
1 1 1 1
0 0 0 0
CF
←
0
1
1
CF reset.
RC5
0 0 0 0
0 1 1 0
HEF0
←
0
1
1
HEF0 reset to inhibit Halt mode release by overflow from the divider circuit.
ISP
1 0 0 1
1 1 1 0
SP
←
(SP)+1
1
1
SP contents incremented +1.
SSP
1 0 1 0
1 1 1 0
SP
←
(AC)
1
1
AC contents loaded to SP.
STA
1 0 1 0
1 1 0 1
M (DP)
←
(AC)
1
1
AC contents stored in memory M (DP).
LDI X
0 0 1 1
X3X2X1X0AC
←
X
1
1
Immediate data X loaded to AC.
SCF
1 1 1 1
0 0 0 1
CF
←
1
1
1
CF set.
Continued on next page.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC573104A | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:4-bit Single Chip Microcontroller |
| LC5732 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:4-Bit Microcomputer with LCD Driver |
| LC573202A | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:4-Bit Microcontroller with 2K-Byte ROM, 64 】 4Bits RAM and LCD Driver |
| LC5732H | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:4-Bit Microcomputer with LCD Driver |
| LC5732N | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:4-Bit Microcomputer with LCD Driver |
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