參數(shù)資料
型號(hào)： LC07410LG
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA40
封裝： 4.40 X 3.60 MM, FLGA-40
文件頁(yè)數(shù)： 22/36頁(yè)
文件大小： 367K
代理商： LC07410LG
LC07410LG
No.A1345-29/36
Continued from precceding page.
Register Data D[7:0]
Functions
ADRS
[7:0]
Init
7
6
5
4
3
2
1
0
FILTER1_B0
29h
40h
B0[15]
B0[14]
B0[13]
B0[12]
B0[11]
B0[10]
B0[9]
B0[8]
FILTER1_B0
2Ah
00h
B0[7]
B0[6]
B0[5]
B0[4]
B0[3]
B0[2]
B0[1]
B0[0]
FILTER1_B1
2Bh
00h
B1[15]
B1[14]
B1[13]
B1[12]
B1[11]
B1[10]
B1[9]
B1[8]
FILTER1_B1
2Ch
00h
B1[7]
B1[6]
B1[5]
B1[4]
B1[3]
B1[2]
B1[1]
B1[0]
FILTER1_B2
2Dh
00h
B2[15]
B2[14]
B2[13]
B2[12]
B2[11]
B2[10]
B2[9]
B2[8]
FILTER1_B2
2Eh
00h
B2[7]
B2[6]
B2[5]
B2[4]
B2[3]
B2[2]
B2[1]
B2[0]
SPK_BEEP1
2Fh
46h
BPTON[2]
BPTON[1]
BPTON[0]
BPTOFF[4]
BPTOFF[3]
BPTOFF[2]
BPTOFF[1]
BPTOFF[0]
SPK_BEEP2
30h
36h
INTBPST
BPHZ[2]
BPHZ[1]
BPHZ[0]
BPCNT[3]
BPCNT[2]
BPCNT[1]
BPCNT[0]
TEST1
31h
00h
0
TEST2
32h
00h
0
TEST3
33h
00h
0
TEST4
34h
9Dh
1
0
1
0
1
TEST5
35h
10h
0
1
0
TEST6
36h
A3h
1
0
1
0
1
TEST7
37h
01h
0
1
TEST8
38h
21h
0
1
0
1
TEST9
39h
00h
0
Register Description
ADRS
Bit
Name
Init
Description
[7]
MIC_PDX
0b
MIC amplifier circuit, power control
1: power on
0: power down
[6]
MIC_PWR_PDX
0b
MIC Power circuit, power control
1: power on
0: power down
[5]
PGA_PDX
0b
PGA circuit, power control
1: power on
0: power down
[4]
ADC_PDX
0b
ADC circuit, power control
1: power on
0: power down
[3]
DAC_PDX
0b
DAC circuit, power control
1: power on
0: power down
[2]
SEL_PDX
0b
Selector circuit, power control
1: power on
0: power down
[1]
LO_PDX
0b
Line out circuit circuit, power control
1: power on
0: power down
00h
[0]
SP_PDX
0b
Speaker amplifier circuit, power control
1: power on
0: power down
[7]
SYNC_CLR
0b
Internal logic clear
1: ON 0: OFF(normal operation)
[5]
[4]
VREF_BIAS
00b
Reference voltage circuit (VREF pin) setting
00: Power down 11: Normal operation
10: Quick rise to reference voltage 01: IREF ON/VREF OFF
[2]
PLL_PDX
0b
PLL circuit, power control
1: power on
0: power down
[1]
REG_PDX
0b
REG circuit, power control
1: power on
0: power down
01h
[0]
VD_PDX
0b
Video driver circuit, power control
1: power on
0: power down
02h
[5:4]
MIC_GAIN
01b
MIC amplifier circuit, gain setting
11: +26dB 10: +20dB 01: 0dB 00: 0dB
[6:4]
ALC_VAL
001b
Set the ALC limiter level
000: -3dBFS 001: -4dBFS 010: -5dBFS 011: -6dBFS
100: -7dBFS 101: -8dBFS 110: -9dBFS 111: -10dBFS
03h
[2:0]
ALC_FA1
010b
Attack coefficient 1 setting
[6:4]
ALC_THA
010b
Set the attack speed switch over thresh
04h
[2:0]
ALC_FA2
100b
Attack coefficient 2 setting
[6:4]
ALC_THR1
011b
Set the recovery speed switch over thresh 1
05h
[2:0]
ALC_FR1
100b
Recovery coefficient 1 setting
[6:4]
ALC_THR2
011b
Set the recovery speed switch over thresh 2
06h
[2:0]
ALC_FR2
100b
Recovery coefficient 2 setting
07h
[2:0]
ALC_FR3
100b
Recovery coefficient 3 setting
Continued on next page
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