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參數(shù)資料
| 型號(hào)： | LAN91C96I |
| 廠商： | SMSC Corporation |
| 英文描述： | NON-PCI SINGLE-CHIP FULL DUPLES ETHERNET CONTROLLER |
| 中文描述： | 非PCI單芯片以太網(wǎng)控制器全DUPLES |
| 文件頁數(shù)： | 50/110頁 |
| 文件大?。?/td> | 655K |
| 代理商： | LAN91C96I |
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Non-PCI Single-Chip Full Duplex Ethernet Controller
Rev.
11/18/2004
Page 50
SMSC DS – LAN91C96I
DATASHEET
I/O SPACE - BANK2
OFFSET
4
NAME
TYPE
SYMBOL
FIFO
FIFO PORTS REGISTER
READ ONLY
This register provides access to the read ports of the Receive FIFO and the Transmit completion FIFO.
The packet numbers to be processed by the interrupt service routines are read from this register.
REMPTY
1
RX FIFO PACKET NUMBER
0
0
0
0
0
0
0
TEMPTY
1
TX FIFO PACKET NUMBER
0
0
0
0
0
0
0
REMPTY - No receive packets queued in the RX FIFO. For polling purposes, uses the RCV_INT bit in the
Interrupt Status Register.
TOP OF RX FIFO PACKET NUMBER - Packet number presently at the output of the RX FIFO. Only valid
if REMPTY is clear. The packet is removed from the RX FIFO using MMU Commands 6) or 8).
TEMPTY - No transmit packets in completion queue. For polling purposes, uses the TX_INT bit in the
Interrupt Status Register.
TX FIFO PACKET NUMBER - Packet number presently at the output of the TX FIFO. Only valid if
TEMPTY is clear. The packet is removed when a TX INT acknowledge is issued.
Note
:
For software compatibility with future versions, the value read from each FIFO register is intended to be
written into the PNR as is, without masking higher bits (provided TEMPTY and REMPTY = 0 respectively).
I/O SPACE - BANK2
OFFSET
6
NAME
TYPE
SYMBOL
PTR
POINTER REGISTER
READ/WRITE
RCV
AUTO
INCR.
0
READ
ETEN
AutoTx
0
POINTER HIGH
0
0
0
0
0
0
POINTER LOW
0
0
0
0
0
0
0
0
POINTER REGISTER - The value of this register determines the address to be accessed within the
transmit or receive areas. It will auto-increment on accesses to the data register when AUTO INCR. is set.
The increment is by one for every byte access, and by two for every word access. When RCV is set the
address refers to the receive area and uses the output of RX FIFO as the packet number, when RCV is
clear the address refers to the transmit area and uses the packet number at the Packet Number Register.
READ bit - Determines the type of access to follow. If the READ bit is high the operation intended is a
read. If the READ bit is low the operation is a write. Loading a new pointer value, with the READ bit high,
generates a pre-fetch into the Data Register for read purposes.
Read-back of the pointer will indicate the value of the address last accessed by the CPU (rather than the
last pre-fetched). This allows any interrupt routine that uses the pointer, to save it and restore it without
affecting the process being interrupted.
The Pointer Register should not be loaded until 400ns after the last write operation to the Data Register to
ensure that the Data Register FIFO is empty. On reads, if IOCHRDY is not connected to the host, the Data
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LAN91C96I_07 | 制造商:SMSC 制造商全稱:SMSC 功能描述:Non-PCI Single-Chip Full Duplex Ethernet Controller |
| LAN91C96IMS | 制造商:Microchip Technology Inc 功能描述: |
| LAN91C96I-MS | 功能描述:以太網(wǎng) IC Non-PCI 10 Mbps Ethernet MAC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| LAN91C96I-MU | 功能描述:以太網(wǎng) IC Non-PCI 10 Mbps Ethernet MAC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| LAN91C96IQFP | 功能描述:以太網(wǎng) IC Non-PCI 10 Mbps Ethernet MAC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
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