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參數(shù)資料
| 型號： | LAN91C95 |
| 英文描述： | LAN Node Controller |
| 中文描述： | 網(wǎng)絡(luò)節(jié)點控制器 |
| 文件頁數(shù)： | 45/55頁 |
| 文件大小： | 482K |
| 代理商： | LAN91C95 |
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FEAST Fast Ethernet Controller
for PCMCIA and Generic 16-Bit Applications
SMSC DS – LAN91C110 REV. B
Page 45
Rev. 09/05/02
In this case, the transmit interrupt service routine can find the next packet number to be serviced by reading the TX
FIFO PACKET NUMBER at the FIFO PORTS register. This eliminates the need for the driver to keep a list of packet
numbers being transmitted. The numbers are queued by the LAN91C110 and provided back to the CPU as their
transmission completes.
2. One interrupt per sequence of packets: Enable TX EMPTY INT and TX INT, set AUTO RELEASE=1. TX EMPTY
INT is generated only after transmitting the last packet in the FIFO.
TX INT will be set on a fatal transmit error allowing the CPU to know that the transmit process has stopped and
therefore the FIFO will not be emptied.
This mode has the advantage of a smaller CPU overhead, and faster memory de-allocation. Note that when AUTO
RELEASE=1 the CPU is not provided with the packet numbers that completed successfully.
Note
: The pointer register is shared by any process accessing the LAN91C110 memory. In order to allow processes
to be interruptable, the interrupting process is responsible for reading the pointer value before modifying it, saving it,
and restoring it before returning from the interrupt.
Typically there would be three processes using the pointer:
1. Transmit loading (sometimes interrupt driven)
2. Receive unloading (interrupt driven)
3. Transmit Status reading (interrupt driven).
1) and 3) also share the usage of the Packet Number Register. Therefore saving and restoring the PNR is also
required from interrupt service routines.
TX
FIFO
TX COFIFO
'NOT EMPTY'
RX
FIFO
CSMA/CD
LOGICAL
ADDRESS
PACKET #
MMU
PHYSICAL ADDRESS
RAM
CPU ADDRESS
CSMA ADDRESS
RX PACKET
NUMBER
RX FIFO
PACKET NUMBER
PACKET NUMBER
REGISTER
PACK # OUT
M.S. BIT ONLY
'EMPTY'
TX DONE
PACKET NUMBER
'NOT EMPTY'
INTERRUPT
STATUS REGISTER
RCV
INT
TX EMPTY
INT
TX
INT
ALLOC
INT
TWO
OPTIONS
FIGURE 12 - INTERRUPT GENERATION FOR TRANSMIT, RECEIVE, MMU
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相關(guān)代理商/技術(shù)參數(shù) |
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| LAN91C95TQFP | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMSC 功能描述: |
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| LAN91C96 | 制造商:SMSC 功能描述: |
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| LAN91C96(100TQFP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
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