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參數資料
| 型號： | LAN91C94 |
| 廠商： | SMSC Corporation |
| 英文描述： | ISA/PCMCIA SINGLE CHIP ETHERNET CONTROLLER WITH RAM |
| 中文描述： | 的ISA / PCMCIA的單芯片以太網控制器與RAM |
| 文件頁數： | 6/55頁 |
| 文件大小： | 482K |
| 代理商： | LAN91C94 |
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FEAST Fast Ethernet Controller
for PCMCIA and Generic 16-Bit Applications
SMSC DS – LAN91C110 REV. B
Page 6
Rev. 09/05/02
144 TQFP
PIN NO.
86,84,85,
75,72,80, 82-
83,81, 77,74-
73, 71-70,67
78
NAME
SYMBOL
BUFFER
TYPE
O4
DESCRIPTION
RAM
Address
Bus
RA[16:2]
Outputs. This bus specifies the buffer RAM
doubleword being accessed by the LAN91C110.
nROE
O4
Output. Active low signal used to read a
doubleword from buffer RAM.
Outputs. Active low signals used to write any
byte, word or dword in RAM.
An external 25 MHz crystal is connected across
these pins. If a TTL clock is supplied instead, it
should be connected to XTAL1 and XTAL2 should
be left open.
I with pullup Input. General purpose input port used to convey
LINK status (EPHSR bit 14).
O4
Output. Non volatile output pin. Driven by AUI
SELECT (CONFIG bit 8).
O12
Output to MII PHY. Envelope to 100 Mbps
transmission.
24,44,58, 68
nRWE[3:0]
O4
2
3
Crystal 1
Crystal 2
XTAL1
XTAL2
Iclk
1
nLink
Status
AUI Select AUISEL
nLNK
139
23
Transmit
Enable
MII
Carrier
Sense MII
Receive
Data Valid
Collision
Detect MII
TXEN100
12
CRS100
I with
pulldown
I with
pulldown
I with
pulldown
O12
Input from MII PHY. Envelope of packet reception
used for deferral and backoff purposes.
Input from MII PHY. Envelope of data valid
reception. Used for receive data framing.
Input from MII PHY. Collision detection input.
8
RX_DV
11
COL100
18,19,21, 22 Transmit
Data
Transmit
Clock
Receive
Clock
Receive
Data
Manage-
ment Data
Input
Manage-
ment Data
Output
Manage-
ment
Clock
Receive
Error
TXD[3:0]
Outputs. Transmit Data nibble to MII PHY.
6
TX25
I with pullup Input. Transmit clock input from MII. Nibble rate
clock (25 MHz).
I with pullup Input. Receive clock input from MII PHY. Nibble
rate clock.
I
Inputs. Received Data nibble from MII PHY.
10
RX25
16-13
RXD[3:0]
141
MDI
I with
pulldown
MII management data input.
140
MDO
O4
MII management data output.
137
MCLK
O4
MII management clock.
7
RX_ER
I with
pulldown
Input. Indicates a code error detected by PHY.
Used by the LAN91C110 to discard the packet
being received. The error indication reported for
this event is the same as a bad CRC (Receive
Status Word bit 13).
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