參數(shù)資料
型號: LAN91C110TQFP
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: FEAST FAST ETHERNET CONTROLLER FOR PCMCIA AND GENERIC 16-BIT APPLICATIONS
中文描述: 4 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝: TQFP-144
文件頁數(shù): 28/55頁
文件大?。?/td> 482K
代理商: LAN91C110TQFP
FEAST Fast Ethernet Controller
for PCMCIA and Generic 16-Bit Applications
SMSC DS – LAN91C110 REV. B
Page 28
Rev. 09/05/02
BANK 2
OFFSET
6
NAME
TYPE
SYMBOL
PTR
POINTER REGISTER
READ/WRITE
NOT EMPTY is a read
only bit
HIGH
BYTE
RCV
AUTO
INCR.
READ
ETEN
NOT
EMPTY
POINTER HIGH
0
0
0
0
0
0
0
0
LOW
BYTE
POINTER LOW
0
0
0
0
0
0
0
0
POINTER REGISTER - The value of this register determines the address to be accessed within the transmit or receive
areas. It will auto-increment on accesses to the data register when AUTO INCR. is set. The increment is by one for every
byte access, by two for every word access, and by four for every double word access. When RCV is set the address
refers to the receive area and uses the output of RX FIFO as the packet number, when RCV is clear the address refers to
the transmit area and uses the packet number at the Packet Number Register.
READ - Determines the type of access to follow. If the READ bit is high the operation intended is a read. If the READ bit is
low the operation is a write. Loading a new pointer value, with the READ bit high, generates a pre-fetch into the Data
Register for read purposes.
Readback of the pointer will indicate the value of the address last accessed by the CPU (rather than the last pre-fetched).
This allows any interrupt routine that uses the pointer, to save it and restore it without affecting the process being
interrupted. The Pointer Register should not be loaded until the Data Register FIFO is empty. The NOT EMPTY bit of this
register can be read to determine if the FIFO is empty. On reads, if IOCHRDY is not connected to the host, the Data Register
(ARDY) should not be read before 370ns after the pointer was loaded to allow the Data Register FIFO to fill.
If the pointer is loaded using 8 bit writes, the low byte should be loaded first and the high byte last.
ETEN - When set enables EARLY Transmit underrun detection. Normal operation when clear.
NOT EMPTY - When set indicates that the Write Data FIFO is not empty yet. The CPU can verify that the FIFO is empty
before loading a new pointer value. This is a read only bit.
Note:
If AUTO INCR. is not set, the pointer must be loaded with a dword aligned value.
BANK 2
OFFSET
NAME
8 THROUGH Bh
DATA REGISTER
TYPE
SYMBOL
DATA
READ/WRITE
DATA HIGH
X
X
X
X
X
X
X
X
DATA LOW
X
X
X
X
X
X
X
X
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