參數(shù)資料
型號: LAN91C100-FD-SS
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: FEAST Fast Ethernet Controller with Full Duplex Capability
中文描述: 2 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208
封裝: GREEN, QFP-208
文件頁數(shù): 8/67頁
文件大小: 369K
代理商: LAN91C100-FD-SS
SMSC DS – LAN91C100FD REV. B
Page 8
Rev. 01-20-06
DESCRIPTION OF PIN FUNCTIONS
SYMBOL
TYPE
LBK
O4
PQFP/TQFP
PIN NO.
202
NAME
Loopback
BUFFER
DESCRIPTION
Output. Active when LOOP bit is set (TCR bit 1).
Independent of port selection (MIISEL=X).
Input. General purpose input port used to convey
LINK status (EPHSR bit 14). Independent of port
selection (MIISEL=X).
Output. Non volatile output pin. Driven by inverse
of FULLSTEP (CONFIG bit 10). Independent of
port selection (MIISEL=X).
Output. Non volatile output pin. Driven by MII
SELECT (CONFIG bit 15). High indicates the MII
port is selected, low indicates the 10 Mbps ENDEC
is selected.
Output. Non volatile output pin. Driven by AUI
SELECT (CONFIG bit 8). Independent of port
selection (MIISEL= X).
Output to MII PHY. Envelope to 100 Mbps
transmission. This pin stays low if MIISEL is low.
1
nLink
Status
nLNK
I with
pullup
195
nFullstep
nFSTEP
O4
6
MII Select
MIISEL
O4
194
AUI Select
AUISEL
O4
30
Transmit
Enable
100 Mbps
Carrier
Sense 100
Mbps
Receive
Data Valid
TXEN100
O12
19
CRS100
I with
pulldown
Input from MII PHY. Envelope of packet reception
used for deferral and backoff purposes. This pin is
ignored when MIISEL is low.
Input from MII PHY. Envelope of data valid
reception. Used for receive data framing. This pin
is ignored when MIISEL is low.
Input from MII PHY. Collision detection input. This
pin is ignored when MIISEL is low.
12
RX_DV
I with
pulldown
18
Collision
Detect 100
Mbps
Transmit
Data
Transmit
Clock
COL100
I with
pulldown
25, 26, 28,
29
9
TXD0-
TXD3
TX25
O12
Outputs. Transmit Data nibble to MII PHY.
I with
pullup
Input. Transmit clock input from MII. Nibble rate
clock (25 MHz). This pin is ignored when MIISEL
is low.
Input. Receive clock input from MII PHY. Nibble
rate clock. This pin is ignored when MIISEL is low.
Inputs. Received Data nibble from MII PHY.
These pins are ignored when MIISEL is low.
MII management data input.
17
Receive
Clock
Receive
Data
Manage-
ment Data
Input
Manage-
ment Data
Output
Manage-
ment Clock
Receive
Error
RX25
I with
pullup
I
20, 21, 22,
24
198
RXD0-
RXD3
MDI
I with
pulldown
196
MDO
O4
MII management data output.
192
MCLK
O4
MII management clock.
11
RX_ER
I with
pulldown
Input. Indicates a code error detected by PHY.
Used by the LAN91C100FD to discard the packet
being received. The error indication reported for
this event is the same as a bad CRC (Receive
Status Word bit 13). This pin is ignored when
MIISEL is low.
相關PDF資料
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相關代理商/技術參數(shù)
參數(shù)描述
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