參數(shù)資料
型號(hào)： LAN9117
廠商： SMSC Corporation
英文描述： HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER
中文描述： 高性能單芯片10/100非PCI以太網(wǎng)控制器
文件頁數(shù)： 40/131頁
文件大?。?/td> 1531K
代理商： LAN9117
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Revision 1.1 (05-17-05)
40
SMSC LAN9117
DATASHEET
3.10.2.3
Power Managment Event Indicators
Figure 3.11
is a simplified block diagram of the logic that controls the external PME, and internal
pme_interrupt signals. The pme_interrupt signal is used to set the PME_INT status bit in the INT_STS
register, which, if enabled, will generate a host interrupt upon detection of a power management event.
The PME_INT status bit in INT_STS will remain set until the internal pme_interrupt signal is cleared
by clearing the WUPS bits, or by clearing the corresponding WOL_EN or ED_EN bit. After clearing the
internal pme_interrupt signal, the PME_INT status bit may be cleared by writing a ‘1’ to this bit in the
INT_STS register. It should be noted that the LAN9117 can generate a host interrupt regardless of the
state of the PME_EN bit, or the external PME signal.
The external PME signal can be setup for pulsed, or static operation. When the PME_IND bit in the
PMT_CTRL register is set to a ‘1’, the external PME signal will be driven active for 50ms upon
detection of a wake-up event. When the PME_IND bit is cleared, the PME signal will be driven
continously upon detection of a wake-up event. The PME signal is deactivated by clearing the WUPS
bits, or by clearing the corresponding WOL_EN or ED_EN bit. The PME signal can also be deactivated
by clearing the PME_EN bit.
Figure 3.11 PME and PME_INT Signal Generation
3.10.3
Internal PHY Power-Down modes
There are 2 power-down modes for the internal Phy:
3.10.3.1
General Power-Down
This power-down is controlled by register 0, bit 11. In this mode the internal PHY, except the
management interface, is powered-down and stays in that condition as long as Phy register bit 0.11 is
HIGH. When bit 0.11 is cleared, the PHY powers up and is automatically reset. Please refer to
Section
5.5.1, "Basic Control Register," on page 107
for additional information on this register.
PME
ED_EN
WOL_EN
50ms
PME_EN
PME_IND
PME_POL
PME_TYPE
LOGIC
WUEN
MPEN
phy_int
WUPS
WUPS
WUFR
MPR
Denotes a level-triggered "sticky" status bit
PME_INT_EN
PME_INT
IRQ_EN
IRQ
Other System
Interrupts
相關(guān)PDF資料
PDF描述
LAN9117-MD HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER
LAN9117-MT HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER
LAN9118 HIGH PERFORMANCE SINGLE CHIP 10/100NON PCI ETHERNET CONTROLLER
LAN9118-MD HIGH PERFORMANCE SINGLE CHIP 10/100NON PCI ETHERNET CONTROLLER
LAN9118-MT HIGH PERFORMANCE SINGLE CHIP 10/100NON PCI ETHERNET CONTROLLER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LAN9117-MD 功能描述:以太網(wǎng) IC HiPerfrm Sngl-Chip 10/100 Ethrnt RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
LAN9117-MT 功能描述:以太網(wǎng) IC HiPerfrm Sngl-Chip 10/100 Ethrnt RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
LAN9118 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
LAN9118_05 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
LAN9118_07 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
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