參數(shù)資料
型號： LAN9117-MT
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 微控制器/微處理器
英文描述： HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER
中文描述： 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝： ROHS COMPLIANT, TQFP-100
文件頁數(shù)： 87/131頁
文件大?。?/td> 1531K
代理商： LAN9117-MT
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
5.3.14
SMSC LAN9117
87
Revision 1.1 (05-17-05)
DATASHEET
GPIO_CFG—General Purpose IO Configuration Register
This register configures the GPIO and LED functions.
Offset:
88h
Size:
32 bits
Bits
Description
Type
Default
31
Reserved
RO
-
30:28
LED[3:1] enable (LEDx_EN).
A ‘1’ sets the associated pin as an LED output.
When cleared low, the pin functions as a GPIO signal.
LED1/GPIO0 – bit 28
LED2/GPIO1 – bit 29
LED3/GPIO2 – bit 30
R/W
000
27
Reserved
RO
-
26:24
GPIO Interrupt Polarity 0-2 (GPIO_INT_POL).
When set high, a high logic
level on the corresponding GPIO pin will set the corresponding INT_STS
register bit. When cleared low, a low logic level on the corresponding GPIO
pin will set the corresponding INT_STS register bit.
GPIO Interrupts must also be enabled in GPIOx_INT_EN in the INT_EN
register.
GPIO0 – bit 24
GPIO1 – bit 25
GPIO2 – bit 26
Note:
GPIO inputs must be active for greater than 40nS to be recognized
as interrupt inputs.
R/W
000
23
Reserved
RO
-
22:20
EEPROM Enable (EEPR_EN).
The value of this field determines the function
of the external EEDIO and EECLK:
Please refer to
Table 5.4
for the EEPROM Enable bit function definitions.
Note:
The host must not change the function of the EEDIO and EECLK
pins when an EEPROM read or write cycle is in progress. Do not
use reserved settings.
Note:
Regardless of whether the internal or external PHY is selected,
RX_DV, TX_CLK and RX_CLK reflect the signals on the internal
PHY and the MAC always drives TX_EN.
R/W
000
19
Reserved
RO
-
18:16
GPIO Buffer Type 0-2 (GPIOBUFn).
When set, the output buffer for the
corresponding GPIO signal is configured as a push/pull driver. When cleared,
the corresponding GPIO set configured as an open-drain driver.
GPIO0 – bit 16
GPIO1 – bit 17
GPIO2 – bit 18
R/W
000
15:11
Reserved
RO
-
10:8
GPIO Direction 0-2 (GPDIRn).
When set, enables the corresponding GPIO
as output. When cleared the GPIO is enabled as an input.
GPIO0 – bit 8
GPIO1 – bit 9
GPIO2 – bit 10
R/W
0000
7:5
Reserved
RO
-
4:3
GPO Data 3-4 (GPODn).
The value written is reflected on GPOn.
GPO3 – bit 3
GPO4 – bit 4
R/W
00
相關(guān)PDF資料
PDF描述
LAN9118 HIGH PERFORMANCE SINGLE CHIP 10/100NON PCI ETHERNET CONTROLLER
LAN9118-MD HIGH PERFORMANCE SINGLE CHIP 10/100NON PCI ETHERNET CONTROLLER
LAN9118-MT HIGH PERFORMANCE SINGLE CHIP 10/100NON PCI ETHERNET CONTROLLER
LAN91C100-FD-SS FEAST Fast Ethernet Controller with Full Duplex Capability
LAN91C100-FD FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LAN9118 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
LAN9118_05 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
LAN9118_07 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
LAN9118-MD 功能描述:以太網(wǎng) IC HiPerfrm Sngl-Chip 10/100 Ethrnt RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
LAN9118-MT 功能描述:以太網(wǎng) IC Ethernet IC 32bit High Performance RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
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