參數(shù)資料
型號(hào)： L6706
廠商： STMICROELECTRONICS
元件分類： 穩(wěn)壓器
英文描述： SWITCHING REGULATOR, QCC40
封裝： 6 X 6 MM, ROHS COMPLIANT, VFQFPN-40
文件頁(yè)數(shù)： 44/47頁(yè)
文件大?。?/td> 623K
代理商： L6706
Pins description and connection diagrams
L6706
6/47
Doc ID 15698 Rev 2
2
Pins description and connection diagrams
Figure 3.
Pins connection (top view)
2.1
Pin description
37
36
35
34
33
32
31
30
10
11
12
13
14
15
16
17
18
27
26
25
24
23
22
21
123456789
OFFSET
OVPSEL
OCSET
OSC/FAULT
SSOSC/FLIMIT
OUTEN
CS+
CS-
INT1
BOOT
UGATE
PHASE
PGND
L6706
VCCDR
N.C.
INT4
N.C.
INT2
VID7
VID6
VID5
VID4
VID3
VID2
VID1
SGND
VCC
COMP
FB
VSEN
FBG
LT
B
IMON
LTBGAIN
SSEND
LGATE
DGND
19
VID0
28
N.C
.
29
INT3
20
40
39
38
Table 2.
Pin description
N°
Name
Description
1DGND
Digital GND.
It must be connected to PGND (power ground).
2SGND
All the internal references are referred to this pin.
Connect it to the PCB signal ground.
3VCC
Device supply voltage pin.
The operative supply voltage is 12 V ±15%. Filter with 1 x 1 F MLCC capacitor
vs. SGND.
4COMP
Error amplifier output.
Connect with an RF - CF//CP vs. FB pin. The device cannot be disabled by
pulling down this pin.
5FB
Error amplifier inverting input pin.
Connect with a resistor RFB vs. VSEN and with an RF - CF//CP vs. COMP pin. A
current proportional to the load current is sourced from this pin in order to
implement the droop effect. See “Droop function” Section for details.
6
VSEN
Output voltage monitor, manages OVP/UVP protections and FB disconnection.
Connect to the positive side of the load to perform remote sense. See “Layout
guidelines” Section for proper layout of this connection.
7FBG
Connect to the negative side of the load to perform remote sense. See “Layout
guidelines” Section for proper layout of this connection.
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