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參數(shù)資料
| 型號： | L6563 |
| 廠商： | 意法半導體 |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | ADVANCED TRANSITION-MODE PFC CONTROLLER |
| 中文描述： | 先進的轉(zhuǎn)型模式PFC控制器 |
| 文件頁數(shù)： | 3/25頁 |
| 文件大?。?/td> | 362K |
| 代理商： | L6563 |
3/25
L6563
Table 4. Pin Description
Pin #
1
Pin Name
INV
Function
Inverting input of the error amplifier. The information on the output voltage of the PFC pre-
regulator is fed into the pin through a resistor divider.
The pin normally features high impedance but, if the tracking boost function is used, an inter-
nal current generator programmed by TBO (pin #6) is activated. It sinks current from the pin
to change the output voltage so that it tracks the mains voltage.
Output of the error amplifier. A compensation network is placed between this pin and INV (pin
#1) to achieve stability of the voltage control loop and ensure high power factor and low THD.
Main input to the multiplier. This pin is connected to the rectified mains voltage via a resistor
divider and provides the sinusoidal reference to the current loop. The voltage on this pin is
used also to derive the information on the RMS mains voltage.
Input to the PWM comparator. The current flowing in the MOSFET is sensed through a resis-
tor, the resulting voltage is applied to this pin and compared with an internal reference to
determine MOSFET’s turn-off.
A second comparison level at 1.7V detects abnormal currents (e.g. due to boost inductor sat-
uration) and, on this occurrence, shuts down the IC, reduces its consumption almost to the
start-up level and asserts PWM_LATCH (pin #8) high.
Second input to the multiplier for 1/V
2
function. A capacitor and a parallel resistor must be
connected from the pin to GND. They complete the internal peak-holding circuit that derives
the information on the RMS mains voltage. The voltage at this pin, a DC level equal to the
peak voltage at pin MULT (#3), compensates the control loop gain dependence on the mains
voltage. Never connect the pin directly to GND.
Tracking Boost function. This pin provides a buffered VFF voltage. A resistor connected
between this pin and GND defines a current that is sunk from pin INV (#1). In this way, the
output voltage is changed proportionally to the mains voltage (tracking boost). If this function
is not used leave this pin open.
PFC pre-regulator output voltage monitoring/disable function. This pin senses the output volt-
age of the PFC pre-regulator through a resistor divider and is used for protection purposes. If
the voltage at the pin exceeds 2.5V the IC is shut down, its consumption goes almost to the
start-up level and this condition is latched. PWM_LATCH pin is asserted high. Normal opera-
tion can be resumed only by cycling the Vcc. This function is used for protection in case the
feedback loop fails.
If the voltage on this pin is brought below 0.2V the IC is shut down and its consumption is
considerably reduced. To restart the IC the voltage on the pin must go above 0.26V. If these
functions are not needed, tie the pin to a voltage between 0.26 and 2.5 V.
Output pin for fault signaling. During normal operation this pin features high impedance. If
either a voltage above 2.5V at PFC_OK (pin #7) or a voltage above 1.7V on CS (pin #4) is
detected the pin is asserted high. Normally, this pin is used to stop the operation of the DC-
DC converter supplied by the PFC pre-regulator by invoking a latched disable of its PWM
controller. If not used, the pin will be left floating.
Output pin for fault signaling. During normal operation this pin features high impedance. If the
IC is disabled by a voltage below 0.5V on RUN (pin #10) the voltage at the pin is pulled to
ground. Normally, this pin is used to temporarily stop the operation of the DC-DC converter
supplied by the PFC pre-regulator by disabling its PWM controller. If not used, the pin will be
left floating.
Remote ON/OFF control. A voltage below 0.52V shuts down (not latched) the IC and brings
its consumption to a considerably lower level. PWM_STOP is asserted low. The IC restarts as
the voltage at the pin goes above 0.6V. Connect this pin to VFF (pin #5) either directly or
through a resistor divider to use this function as brownout (AC mains undervoltage) protec-
tion, tie to INV (pin #1) if the function is not used.
Boost inductor’s demagnetization sensing input for transition-mode operation. A negative-
going edge triggers MOSFET’s turn-on.
Ground. Current return for both the signal part of the IC and the gate driver.
Gate driver output. The totem pole output stage is able to drive power MOSFET’s and IGBT’s
with a peak current of 600 mA source and 800 mA sink. The high-level voltage of this pin is
clamped at about 12V to avoid excessive gate voltages.
Supply Voltage of both the signal part of the IC and the gate driver.
2
COMP
3
MULT
4
CS
5
VFF
6
TBO
7
PFC_OK
8
PWM_LATCH
9
PWM_STOP
10
RUN
11
ZCD
12
13
GND
GD
14
Vcc
相關PDF資料 |
PDF描述 |
|---|---|
| L6563TR | ADVANCED TRANSITION-MODE PFC CONTROLLER |
| L6566A | Multi-mode controller for SMPS with PFC front-end |
| L6566ATR | Multi-mode controller for SMPS with PFC front-end |
| L6566B | Multi-mode controller for SMPS |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| L6563_07 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Advanced transition-mode PFC controller |
| L6563A | 功能描述:功率因數(shù)校正 IC Advanced transition mode PFC controller RoHS:否 制造商:Fairchild Semiconductor 開關頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel |
| L6563ATR | 功能描述:功率因數(shù)校正 IC Advanced transition mode PFC controller RoHS:否 制造商:Fairchild Semiconductor 開關頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel |
| L6563CYTR | 制造商:ST 功能描述:ADVANCED TRANSITION-MODE PFC CONTROLLER |
| L6563H | 功能描述:功率因數(shù)校正 IC High voltage start Transition-mode PFC RoHS:否 制造商:Fairchild Semiconductor 開關頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel |
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