參數(shù)資料
型號: KSZ8895MQI
廠商: Micrel Inc
文件頁數(shù): 57/119頁
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 5PORT 128PQFP
特色產(chǎn)品: KSZ8895MQ Ethernet Switches
標(biāo)準(zhǔn)包裝: 66
系列: *
其它名稱: 576-3997
PIC16(L)F1782/3
DS41579C-page 42
Preliminary
2011-2012 Microchip Technology Inc.
3.6.2
LINEAR DATA MEMORY
The linear data memory is the region from FSR
address 0x2000 to FSR address 0x29AF. This region is
a virtual region that points back to the 80-byte blocks of
GPR memory in all the banks.
Unimplemented memory reads as 0x00. Use of the
linear data memory region allows buffers to be larger
than 80 bytes because incrementing the FSR beyond
one bank will go directly to the GPR memory of the next
bank.
The 16 bytes of common memory are not included in
the linear data memory region.
FIGURE 3-11:
LINEAR DATA MEMORY
MAP
3.6.3
PROGRAM FLASH MEMORY
To make constant data access easier, the entire
program Flash memory is mapped to the upper half of
the FSR address space. When the MSB of FSRnH is
set, the lower 15 bits are the address in program
memory which will be accessed through INDF. Only the
lower 8 bits of each memory location is accessible via
INDF. Writing to the program Flash memory cannot be
accomplished via the FSR/INDF interface. All
instructions that access program Flash memory via the
FSR/INDF interface will require one additional
instruction cycle to complete.
FIGURE 3-12:
PROGRAM FLASH
MEMORY MAP
7
0
1
7
0
Location Select
0x2000
FSRnH
FSRnL
0x020
Bank 0
0x06F
0x0A0
Bank 1
0x0EF
0x120
Bank 2
0x16F
0xF20
Bank 30
0xF6F
0x29AF
0
7
1
7
0
Location Select
0x8000
FSRnH
FSRnL
0x0000
0x7FFF
0xFFFF
Program
Flash
Memory
(low 8
bits)
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