參數(shù)資料
型號(hào): KSZ8895MQI
廠商: Micrel Inc
文件頁(yè)數(shù): 102/119頁(yè)
文件大小: 0K
描述: IC ETHERNET SWITCH 5PORT 128PQFP
特色產(chǎn)品: KSZ8895MQ Ethernet Switches
標(biāo)準(zhǔn)包裝: 66
系列: *
其它名稱: 576-3997
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2011-2012 Microchip Technology Inc.
Preliminary
DS41579C-page 83
PIC16(L)F1782/3
8.3
Interrupts During Sleep
Some interrupts can be used to wake from Sleep. To
wake from Sleep, the peripheral must be able to
operate without the system clock. The interrupt source
must have the appropriate Interrupt Enable bit(s) set
prior to entering Sleep.
On waking from Sleep, if the GIE bit is also set, the
processor will branch to the interrupt vector. Otherwise,
the processor will continue executing instructions after
the SLEEP instruction. The instruction directly after the
SLEEP instruction will always be executed before
branching
to
the
ISR.
Refer
to
8.4
INT Pin
The INT pin can be used to generate an asynchronous
edge-triggered interrupt. This interrupt is enabled by
setting the INTE bit of the INTCON register. The
INTEDG bit of the OPTION_REG register determines on
which edge the interrupt will occur. When the INTEDG
bit is set, the rising edge will cause the interrupt. When
the INTEDG bit is clear, the falling edge will cause the
interrupt. The INTF bit of the INTCON register will be set
when a valid edge appears on the INT pin. If the GIE and
INTE bits are also set, the processor will redirect
program execution to the interrupt vector.
8.5
Automatic Context Saving
Upon entering an interrupt, the return PC address is
saved on the stack. Additionally, the following registers
are automatically saved in the Shadow registers:
W register
STATUS register (except for TO and PD)
BSR register
FSR registers
PCLATH register
Upon exiting the Interrupt Service Routine, these regis-
ters are automatically restored. Any modifications to
these registers during the ISR will be lost. If modifica-
tions to any of these registers are desired, the corre-
sponding Shadow register should be modified and the
value will be restored when exiting the ISR. The
Shadow registers are available in Bank 31 and are
readable and writable. Depending on the user’s appli-
cation, other registers may also need to be saved.
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KSZ8895MQXCA 功能描述:Ethernet Switch 10/100 Base-T/TX I2C, SPI Interface 128-PQFP (14x20) 制造商:microchip technology 系列:- 包裝:托盤(pán) 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:開(kāi)關(guān) 接口:I2C,SPI 標(biāo)準(zhǔn):10/100 Base-T/TX 電壓 - 電源:1.8V,2.5V,3.3V 電流 - 電源:129mA 工作溫度:0°C ~ 70°C 封裝/外殼:128-BFQFP 供應(yīng)商器件封裝:128-PQFP(14x20) 標(biāo)準(zhǔn)包裝:66
KSZ8895MQXIA 功能描述:Ethernet Switch 10/100 Base-T/TX I2C, SPI Interface 128-PQFP (14x20) 制造商:microchip technology 系列:- 包裝:托盤(pán) 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:開(kāi)關(guān) 接口:I2C,SPI 標(biāo)準(zhǔn):10/100 Base-T/TX 電壓 - 電源:1.8V,2.5V,3.3V 電流 - 電源:129mA 工作溫度:-40°C ~ 85°C 封裝/外殼:128-BFQFP 供應(yīng)商器件封裝:128-PQFP(14x20) 標(biāo)準(zhǔn)包裝:66
KSZ8895RQ 功能描述:以太網(wǎng) IC 5-port Switch, one SW5-RMII and one P5-RMII Interface RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8895RQ TR 功能描述:以太網(wǎng) IC 5-port Switch, one SW5-RMII and one P5-RMII Interface RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8895RQ-EVAL 功能描述:以太網(wǎng)開(kāi)發(fā)工具 5-port Switch, one SW5-RMII and one P5-RMII Interface - Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類(lèi)型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類(lèi)型:RMII 工作電源電壓: