參數(shù)資料
型號: KSZ8864RMN
廠商: Micrel Inc
文件頁數(shù): 6/111頁
文件大?。?/td> 0K
描述: IC ETHERNET SW 4PORT 64QFN
標準包裝: 348
控制器類型: 以太網(wǎng)開關控制器
接口: MII,RMII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤
供應商設備封裝: 64-QFN(8x8)
包裝: 托盤
配用: 576-3869-ND - BOARD EVALUATION FOR KSZ8864RMN
其它名稱: 576-3787
KSZ8864RMN-ND
1997 Microchip Technology Inc.
DS30444E - page 103
PIC16C9XX
14.0
SPECIAL FEATURES OF THE
CPU
What sets a microcontroller apart from other proces-
sors are special circuits to deal with the needs of
real-time applications. The PIC16CXXX family has a
host of such features intended to maximize system reli-
ability, minimize cost through elimination of external
components, provide power saving operating modes
and offer code protection. These are:
Oscillator selection
Reset
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
Interrupts
Watchdog Timer (WDT)
SLEEP
Code protection
ID locations
In-circuit serial programming
The PIC16CXXX has a Watchdog Timer which can be
shut off only through conguration bits. It runs off its
own RC oscillator for added reliability. There are two
timers that offer necessary delays on power-up. One is
the Oscillator Start-up Timer (OST), intended to keep
the chip in reset until the crystal oscillator is stable. The
other is the Power-up Timer (PWRT), which provides a
xed delay of 72 ms (nominal) on power-up only,
designed to keep the part in reset while the power sup-
ply stabilizes. With these two timers on-chip, most
applications need no external reset circuitry.
SLEEP mode is designed to offer a very low current
power-down mode. The user can wake-up from SLEEP
through external reset, Watchdog Timer Wake-up or
through an interrupt. Several oscillator options are also
made available to allow the part to t the application.
The RC oscillator option saves system cost while the
LP crystal option saves power. A set of conguration
bits are used to select various options.
14.1
Conguration Bits
The conguration bits can be programmed (read as '0')
or left unprogrammed (read as '1') to select various
device congurations. These bits are mapped in pro-
gram memory location 2007h.
The user will note that address 2007h is beyond the
user program memory space. In fact, it belongs to the
special test/conguration memory space (2000h -
3FFFh), which can be accessed only during program-
ming.
FIGURE 14-1: CONFIGURATION WORD
CP1
CP0
CP1
CP0
CP1
CP0
CP1
CP0
PWRTE WDTE FOSC1 FOSC0
Register:
CONFIG
Address
2007h
bit13
bit0
bit 13-8 CP1:CP0 Code protection bits (1)
5-4: 11 = Code protection off
10 = Upper half of program memory code protected
01 = Upper 3/4 of program memory code protected
00 = All memory is code protected
bit 6:
Unimplemented: Read as '1'
bit 3:
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
bit 2:
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
bit 1-0:
FOSC1:FOSC0: Oscillator Selection bits
11
= RC oscillator
10
= HS oscillator
01
= XT oscillator
00
= LP oscillator
Note
1: All of the CP1:CP0 bits have to be given the same value to enable the code protection scheme listed.
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