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    參數(shù)資料
    型號(hào): KSZ8864RMN
    廠商: Micrel Inc
    文件頁(yè)數(shù): 41/111頁(yè)
    文件大小: 0K
    描述: IC ETHERNET SW 4PORT 64QFN
    標(biāo)準(zhǔn)包裝: 348
    控制器類型: 以太網(wǎng)開(kāi)關(guān)控制器
    接口: MII,RMII
    電源電壓: 1.8V,2.5V,3.3V
    工作溫度: 0°C ~ 70°C
    安裝類型: 表面貼裝
    封裝/外殼: 64-VFQFN 裸露焊盤
    供應(yīng)商設(shè)備封裝: 64-QFN(8x8)
    包裝: 托盤
    配用: 576-3869-ND - BOARD EVALUATION FOR KSZ8864RMN
    其它名稱: 576-3787
    KSZ8864RMN-ND
    1997 Microchip Technology Inc.
    DS30444E - page 35
    PIC16C9XX
    5.3
    PORTC and TRISC Register
    PORTC is an 6-bit bi-directional port. Each pin is indi-
    vidually congurable as an input or output through the
    TRISC register. PORTC is multiplexed with several
    peripheral functions (Table 5-5). PORTC pins have
    Schmitt Trigger input buffers.
    When enabling peripheral functions, care should be
    taken in dening TRIS bits for each PORTC pin. Some
    peripherals override the TRIS bit to make a pin an out-
    put, while other peripherals override the TRIS bit to
    make a pin an input. Since the TRIS bit override is in
    effect while the peripheral is enabled, read-mod-
    ify-write instructions (BSF, BCF, XORWF) with TRISC
    as destination should be avoided. The user should refer
    to the corresponding peripheral section for the correct
    TRIS bit settings.
    EXAMPLE 5-3:
    INITIALIZING PORTC
    BCF
    STATUS,RP0 ; Select Bank0
    BCF
    STATUS,RP1
    CLRF
    PORTC
    ; Initialize PORTC
    BSF
    STATUS,RP0 ;
    MOVLW
    0xCF
    ; Value used to
    ; initialize data
    ; direction
    MOVWF
    TRISC
    ; Set RC<3:0> as inputs
    ; RC<5:4> as outputs
    ; RC<7:6> always read 0
    FIGURE 5-5:
    PORTC BLOCK DIAGRAM
    (PERIPHERAL OUTPUT
    OVERRIDE)
    Data Latch
    RBPU(2)
    P
    VDD
    Q
    D
    CK
    Q
    D
    CK
    Q
    D
    EN
    Data bus
    WR Port
    WR TRIS
    RD TRIS
    RD Port
    weak
    pull-up
    RD Port
    RB0/INT
    I/O
    pin(1)
    TTL
    Input
    Buffer
    Note 1: I/O pins have diode protection to VDD and VSS.
    2: To enable weak pull-ups, set the appropriate TRIS bit(s)
    and clear the RBPU bit (OPTION<7>).
    Schmitt Trigger
    Buffer
    TRIS Latch
    TABLE 5-5: PORTC FUNCTIONS
    TABLE 5-6: SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
    Name
    Bit#
    Buffer Type
    Function
    RC0/T1OSO/T1CKI
    bit0
    ST
    Input/output port pin or Timer1 oscillator output or Timer1 clock input
    RC1/T1OSI
    bit1
    ST
    Input/output port pin or Timer1 oscillator input
    RC2/CCP1
    bit2
    ST
    Input/output port pin or Capture input/Compare output/PWM output
    RC3/SCK/SCL
    bit3
    ST
    Input/output port pin or the synchronous serial clock for both SPI and
    I2C modes.
    RC4/SDI/SDA
    bit4
    ST
    Input/output port pin or the SPI Data In (SPI mode) or data I/O (I2C
    mode).
    RC5/SDO
    bit5
    ST
    Input/output port pin or Synchronous Serial Port data out
    Legend: ST = Schmitt Trigger input
    Address Name
    Bit 7
    Bit 6
    Bit 5
    Bit 4
    Bit 3
    Bit 2
    Bit 1
    Bit 0
    Value on
    Power-on
    Reset
    Value on all
    other resets
    07h
    PORTC
    RC5
    RC4
    RC3
    RC2
    RC1
    RC0
    --xx xxxx
    --uu uuuu
    87h
    TRISC
    PORTC Data Direction Control Register
    --11 1111
    Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PORTC.
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