參數(shù)資料
型號(hào)： KSZ8842-PMQL-EVAL
廠商： Micrel Inc
文件頁(yè)數(shù)： 98/119頁(yè)
文件大?。?/td> 0K
描述： BOARD EVALUATION KSZ8842-PMQL
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，以太網(wǎng)控制器（PHY 和 MAC）
嵌入式： 否
已用 IC / 零件： KSZ8842-PMQL
主要屬性： 2 個(gè)端口，100BASE-TX/10BASE-T
次要屬性： 8/16 位接口，LinkMD 線纜診斷
已供物品： 板
產(chǎn)品目錄頁(yè)面： 1114 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： 576-3348-ND - IC ETHERNET SW 2PORT 100-LFBGA
576-3089-ND - IC ETHERNT SW 2PORT PCI 100LFBGA
576-2121-ND - IC ETHERNET SW 2PORT PCI 128PQFP
576-1513-5-ND - IC SWITCH 10/100 32BIT 128-PQFP
其它名稱： 576-1636
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Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
8
M9999-100207-1.5
List of Figures
Figure 1. KSZ8842-PMQL/PMBL Functional Diagram ....................................................................................................... 1
Figure 2. KSZ8842-PMQL 128-Pin PQFP (Top View)........................................................................................................ 9
Figure 3. KSZ8842-PMBL 100-Ball LFBGA (Top View) .................................................................................................. 10
Figure 4. Typical Straight Cable Connection ................................................................................................................... 22
Figure 5. Typical Crossover Cable Connection ............................................................................................................... 23
Figure 6. Auto Negotiation and Parallel Operation .......................................................................................................... 24
Figure 7. Destination Address Lookup Flow Chart, Stage 1 ............................................................................................ 26
Figure 8. Destination Address Resolution Flow Chart, Stage 2....................................................................................... 27
Figure 9. 802.1p Priority Field Format.............................................................................................................................. 32
Figure 10. Port 2 Far-End Loop back Path ...................................................................................................................... 34
Figure 11. Port 1 and Port 2 Near-End (Remote) Loop back Path .................................................................................. 34
Figure 12. EEPROM Read Cycle Timing Diagram ........................................................................................................ 111
Figure 13. Auto-Negotiation Timing ............................................................................................................................... 112
Figure 14. Reset Timing ................................................................................................................................................. 113
Figure 15. Standard Package: 128-Pin PQFP ............................................................................................................... 115
Figure 16. Standard Package: 100-Ball LFBGA ............................................................................................................. 116
List of Tables
Table 1. KSZ8842-PMQL Pin Description......................................................................................................................... 15
Table 2. KSZ8842-PMBL Pin Description ......................................................................................................................... 19
Table 3. MDI/MDI-X Pin Definitions ................................................................................................................................. 22
Table 4. KSZ8841-PMQL/PMBL EEPROM Format......................................................................................................... 30
Table 5. FID+DA Lookup in VLAN Mode ......................................................................................................................... 31
Table 6. FID+SA Lookup in VLAN Mode ......................................................................................................................... 31
Table 7. EEPROM Format ............................................................................................................................................... 33
Table 8. Format of Per Port MIB Counters...................................................................................................................... 103
Table 9. Port 1s “Per Port” MIB Counters Indirect Memory Offsets............................................................................... 104
Table 10. “All Port Dropped Packet” MIB Counters Format............................................................................................ 104
Table 11. “All Port Dropped Packet” MIB Counters Indirect Memory Offsets................................................................. 104
Table 12. Static MAC Table Format (8 Entries) .............................................................................................................. 106
Table 13. Dynamic MAC Address Table Format (1024 Entries)..................................................................................... 107
Table 14. VLAN Table Format (16 Entries)..................................................................................................................... 108
Table 15. EEPROM Timing Parameters ........................................................................................................................ 111
Table 16. Auto Negotiation Parameters ......................................................................................................................... 112
Table 17. Reset Timing Parameters .............................................................................................................................. 113
Table 18. Transformer Selection Criteria ....................................................................................................................... 114
Table 19. Qualified Single Port Magnetics ..................................................................................................................... 114
Table 20. Typical Reference Crystal Characteristics ...................................................................................................... 114
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