參數(shù)資料
型號: KSZ8842-PMBL
廠商: Micrel Inc
文件頁數(shù): 9/119頁
文件大小: 0K
描述: IC ETHERNT SW 2PORT PCI 100LFBGA
特色產(chǎn)品: Micrel Drives Ethernet Into the Global Automotive World
標準包裝: 260
控制器類型: 以太網(wǎng)開關控制器
接口: PCI
電源電壓: 3.1 V ~ 3.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LFBGA
供應商設備封裝: 100-LFBGA
包裝: 托盤
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
配用: 576-1636-ND - BOARD EVALUATION KSZ8842-PMQL
其它名稱: 576-3089
Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
106
M9999-100207-1.5
Static MAC Address Table
The KSZ8842-PMQL/PMBL supports both a static and a dynamic MAC address table. In response to a Destination
Address (DA) look up, The KSZ8842-PMQL/PMBL searches both tables to make a packet forwarding decision. In
response to a Source Address (SA) look up, only the dynamic table is searched for aging, migration and learning
purposes.
The static DA look up result takes precedence over the dynamic DA look up result. If there is a DA match in both
tables, the result from the static table is used. These entries in the static table will not be aged out by the KSZ8842-
PMQL/PMBL.
Bit
Default
R/W
Description
57 – 54
0000
RW
FID
Filter VLAN ID - identifies one of the 16 active VLANs.
53
0
R/W
Use FID
1 =specifies the use of FID+MAC for static table look ups
0 = specifies only the use of MAC for static table look ups
52
0
R/W
Override
1 = overrides the port setting “transmit enable=0” or “receive enable=0”
setting.
0 = specifies no override
51
0
R/W
Valid
1 = specifies that this entry is valid, the look up result will be used
0 = specifies that this entry is not valid
50 – 48
000
R/W
Forwarding ports
These 3 bits control the forwarding port(s):
000 ,no forward
001, forward to port 1
010, forward to port 2
100, forward to port 3
011, forward to port 1 and port 2
110, forward to port 2 and port 3
101, forward to port 1 and port 3
111, broadcasting (excluding the ingress port)
47 – 0
0
R/W
MAC address
48 bits MAC Address
Table 12. Static MAC Table Format (8 Entries)
Examples:
1. Static Address Table Read (read the second entry at indirect address offset 0x01)
Write to reg. IACR with 0x1001 (set indirect address and trigger a read static MAC table operation)
Then
Read reg. IADR3 (static MAC table bits 57-48)
Read reg. IADR2 (static MAC table bits 47-32)
Read reg. IADR5 (static MAC table bits 31-16)
Read reg. IADR4 (static MAC table bits 15-0)
2. Static Address Table Write (write the eighth entry at indirect address offset 0x07)
Write to reg. IADR3 (static MAC table bits 57-48)
Write to reg. IADR2 (static MAC table bits 47-32)
Write to reg. IADR5 (static MAC table bits 31-16)
Write to reg. IADR4 (static MAC table bits 15-0)
Write to reg. IACR with 0x0007 (set indirect address and trigger a write static MAC table operation)
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