參數(shù)資料
型號(hào): KM44C1003D
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 1M x 4Bit CMOS Quad CAS DRAM with Fast Page Mode(1M x 4位CMOS四 CAS 動(dòng)態(tài)RAM(帶快速頁模式))
中文描述: 100萬x 4位的CMOS DRAM與四中科院快速頁面模式(1米× 4位的CMOS四中科院動(dòng)態(tài)隨機(jī)存儲(chǔ)器(帶快速頁模式))
文件頁數(shù): 6/21頁
文件大?。?/td> 388K
代理商: KM44C1003D
KM44C1003D
CMOS DRAM
AC CHARACTERISTICS
(Continued)
Parameter
Symbol
-5
-6
-7
Units
Notes
Min
Max
Min
Max
Min
Max
Refresh period (4K, Normal)
t
REF
t
REF
t
WCS
t
CWD
t
RWD
t
AWD
t
CPWD
t
CSR
t
CHR
t
RPC
t
CPT
t
CPA
t
PC
t
PRWC
t
CP
t
RASP
t
RHCP
t
OEA
t
OED
t
CPWD
t
OEZ
t
OEH
t
WTS
t
WTH
t
WRP
t
WRH
t
CLCH
16
16
16
ms
Refresh period (L-ver)
128
128
128
ms
Write command set-up time
0
0
0
ns
7,16
CAS to W delay time
37
37
47
ns
7,16
RAS to W delay time
72
82
97
ns
7
Column address to W delay time
47
52
62
ns
7
CAS precharge to W delay time
52
57
67
ns
7
CAS set-up time (CAS-before-RAS refresh)
10
10
10
ns
16
CAS hold time (CAS-before-RAS refresh)
10
10
15
ns
RAS to CAS precharge time
5
5
5
ns
CAS precharge time (C-B-R counter test cycle)
20
20
30
ns
Access time from CAS precharge
30
35
40
ns
3,18
Fast Page mode cycle time
35
40
45
ns
19
Fast Page read-modify-write cycle time
77
82
97
ns
19
CAS precharge time (Fast Page cycle)
10
10
10
ns
20
RAS pulse width (Fast Page cycle)
50
200K
60
200K
70
200K
ns
RAS hold time from CAS precharge
30
35
40
ns
OE access time
15
15
20
ns
21
OE to data delay
12
12
17
ns
22
CAS precharge to W delay time
53
60
70
ns
Output buffer turn off delay time from OE
0
12
0
12
0
17
ns
6
OE command hold time
15
15
20
ns
Write command set-up time (Test mode in)
10
10
10
ns
Write command hold time (Test mode in)
10
10
10
ns
W to RAS precharge time (C-B-R refresh)
10
10
10
ns
W to RAS hold time (C-B-R refresh)
5
5
5
ns
Hold time CAS low to CAS high
5
5
5
ns
14,25
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