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參數(shù)資料
| 型號： | KM432V515 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512K x 32Bit CMOS Quad CAS DRAM with EDO(512K x 32位CMOS四 CAS 動態(tài)RAM(帶EDO模式)) |
| 中文描述： | 為512k × 32Bit的中科院的CMOS四路DRAM與江戶（512k × 32的位的CMOS四中科院動態(tài)隨機存儲器（帶EDO公司模式）） |
| 文件頁數(shù)： | 6/21頁 |
| 文件大?。?/td> | 400K |
| 代理商： | KM432V515 |
CMOS DRAM
KM432V515
Preliminary
AC CHARACTERISTICS
(Continued)
Parameter
Symbol
t
REF
t
REF
t
WCS
t
CWD
t
RWD
t
AWD
t
CPWD
t
CSR
t
CHR
t
RPC
t
CPA
t
HPC
t
HPRWC
t
CP
t
RASP
t
RHCP
t
OEA
t
OED
t
OEZ
t
OEH
t
DOH
t
REZ
t
WEZ
t
WED
t
OCH
t
CHO
t
OEP
t
WPE
t
RASS
t
RPS
t
CHS
t
CLCH
Min
Max
Units
Notes
Refresh period (1K, Normal)
16
ms
Refresh period (L-ver)
128
ms
Write command set-up time
0
ns
7,16
CAS to W delay time
36
ns
7,14
RAS to W delay time
79
ns
7
Column address W delay time
49
ns
7
CAS precharge to W delay time
54
ns
7
CAS set-up time (CAS -before-RAS refresh)
5
ns
16
CAS hold time (CAS -before-RAS refresh)
10
ns
15
RAS to CAS precharge time
5
ns
16
Access time from CAS precharge
35
ns
3,15
Hyper Page mode cycle time
27
ns
12,19
Hyper Page read-modify-write cycle time
56
ns
12,19
CAS precharge time (Hyper Page cycle)
7
ns
20
RAS pulse width (Hyper Page cycle)
60
200K
ns
RAS hold time from CAS precharge
35
ns
OE access time
15
ns
21
OE to data delay
15
ns
22
Output buffer turn off delay time from OE
3
15
ns
6
OE command hold time
15
ns
Output data hold time
5
ns
Output buffer turn off delay from RAS
3
15
ns
6,11
Output buffer turn off delay from W
3
15
ns
6
W to data delay
15
ns
OE to CAS hold time
5
ns
CAS hold time to OE
5
ns
OE precharge time
5
ns
W pulse width (Hyper Page Cycle)
5
ns
RAS pulse width (C-B-R self refresh)
100
us
25,26,27
RAS precharge time (C-B-R self refresh)
110
ns
25,26,27
CAS hold time (C-B-R self refresh)
-50
ns
25,26,27
Hold time CAS low to CAS high
5
ns
13,24
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