參數(shù)資料
型號(hào): KM432V515
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 512K x 32Bit CMOS Quad CAS DRAM with EDO(512K x 32位CMOS四 CAS 動(dòng)態(tài)RAM(帶EDO模式))
中文描述: 為512k × 32Bit的中科院的CMOS四路DRAM與江戶(512k × 32的位的CMOS四中科院動(dòng)態(tài)隨機(jī)存儲(chǔ)器(帶EDO公司模式))
文件頁(yè)數(shù): 4/21頁(yè)
文件大?。?/td> 400K
代理商: KM432V515
CMOS DRAM
KM432V515
Preliminary
*Note :
I
CC1
, I
CC3
, I
CC4
and I
CC6
are dependent on output loading and cycle rates. Specified values are obtained with the output open.
I
CC
is specified as an average current. In I
CC1
, I
CC3
and I
CC6,
address can be changed maximum once while RAS=V
IL
. In I
CC4
,
address can be changed maximum once within one Hyper page mode cycle time, t
HPC
.
DC AND OPERATING CHARACTERISTICS
(Continued)
I
CC1
* : Operating Current ( RAS and CAS cycling @t
RC
=min. )
I
CC2
: Standby Current ( RAS = CAS = W = V
IH
)
I
CC3
* : RAS-only Refresh Current ( CAS = V
IH
, RAS, Address cycling @t
RC
=min. )
I
CC4
* : Hyper Page Mode Current ( RAS = V
IL
, CAS, Address cycling @t
HPC
=min. )
I
CC5
: Standby Current ( RAS = CAS = W = V
CC
-0.2V )
I
CC6
* : CAS-Before-RAS Refresh Current ( RAS, CAS cycling @t
RC
=min. )
I
CC7
: Battery back-up current, Average power supply current, Battery back-up mode
Input high voltage(V
IH
) = V
CC
-0.2V, Input low voltage(V
IL
) = 0.2V, CAS = 0.2V,
Din = Don't care, T
RC
= 125us(1K/L-ver)
T
RAS
= T
RAS
min~300ns
I
CCS
: Self Refresh Current
RAS=CAS0~3 =V
IL
, W = OE = A0 ~ A9 = V
CC
-0.2V or 0.2V,
DQ0 ~ DQ31 = V
CC
-0.2V, 0.2V or Open
Symbol
I
CC1
Power
Don't care
Normal
L
Don't care
Don't care
Normal
L
Don't care
L
L
Max
150
1
1
150
100
500
300
150
300
200
Units
mA
I
CC2
mA
I
CC3
I
CC4
mA
mA
I
CC5
uA
I
CC6
I
CC7
I
CCS
mA
uA
uA
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