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參數(shù)資料
| 型號： | KM416S4031C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1M x 16Bit x 4 Banks Synchronous DRAM with SSTL interface(1M x 16位 x4組同步動態(tài)RAM（帶SSTL接口）) |
| 中文描述： | 100萬× 16 × 4銀行同步DRAM接口與薩里衛(wèi)星技術有限公司（100萬× 16位x4組同步動態(tài)隨機存儲器（帶SSTL公司接口）） |
| 文件頁數(shù)： | 3/8頁 |
| 文件大小： | 62K |
| 代理商： | KM416S4031C |
KM416S4031C
CMOS SDRAM
REV. 0 April 1998
Preliminary
CAPACITANCE
(V
DD
= 3.3V, T
A
= 23
°
C, f = 1MHz, V
REF
= 1.4V
± 200
mV)
Parameter
Symbol
Min
Max
Unit
RAS, CAS, WE, CS, CKE, L(U)DQM,CLK
C
IN
2
4
pF
Address
C
ADD
2
4
pF
DQ
0
~ DQ
15
C
OUT
3
6
pF
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Voltage on any pin relative to Vss
V
IN
, V
OUT
-1.0 ~ 4.6
V
Voltage on V
DD
supply relative to Vss
V
DD
, V
DDQ
-1.0 ~ 4.6
V
Storage temperature
T
STG
-55 ~ +150
°
C
Power dissipation
P
D
1
W
Short circuit current
I
OS
50
mA
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Note :
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= 0 to 70
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Device supply voltage
V
DD
V
DDQ
-
3.6
V
1
Output supply voltage
V
DDQ
3.0
3.3
3.6
V
1
3.26
3.43
3.6
V
8
Input reference voltage
V
REF
1.3
1.5
1.7
V
2, 3
Termination voltage
Vtt
V
REF
-0.05
V
REF
V
REF
+0.05
V
Input logic high voltage
V
IH
V
REF
+0.2
-
V
DD
+0.3
V
1
Input logic low voltage
V
IL
-0.3
0
V
REF
-0.2
V
2
Output logic high voltage
V
OH
Vtt+0.8
-
-
V
5
Output logic low voltage
V
OL
-
-
Vtt-0.8
V
5
Input leakage current
I
IL
-5
-
5
uA
6
Output leakage current
I
OL
-5
-
5
uA
7
1.Under all conditions, V
DDQ
must be less than or equal to V
DD
.
2. Typically, the value of V
REF
is expected to be about 0.45 * V
DDQ
of the transmitting device.
V
REF
is expected to track variations in V
DDQ
.
3. Peak to peak AC noise on V
REF
may not exceed 2% V
REF
(DC)
4. Vtt of transmitting device must track V
REF
of receiving device.
5. Voltage level measured at device pin with I
OH
/I
OL
= -16mA/16mA.
6. Any input 0V
≤
V
IN
≤
V
DD
+0.3V, all other pins are not under test = 0V.
7. Dout buffer is disabled, 0V
≤
V
OUT
≤
V
DD
.
8. Apply to only the KM416S4031BT-GS.
Notes :
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| KM416S8030BN | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL |
| KM416S8030BN-G/FH | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL |
| KM416S8030BN-G/FL | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL |
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