參數(shù)資料
型號(hào)： KIT33394DWBEVB
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 16/44頁(yè)
文件大?。?/td> 0K
描述： KIT EVAL FOR MC33394 8X PWR SPLY
標(biāo)準(zhǔn)包裝： 1
33394
23
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
The Wake–up function can be disabled through SPI by setting
the WKUP bit to 0.
The CAN transceiver of the 33394 is designed for
communications speeds up to 1.0 Mbps. The use of a
common mode choke may be required in some applications.
When the 33394 CAN transceiver physical interface is not
used in the system design, the CAN bus driver pins CANH and
CANL should be shorted together.
4.16.3. CANH
CANH is an output driver stage that sources current on the
CANH output. It’s output follows CANL, but in the opposite
polarity. The output is short circuit protected. In the event that
battery or ground is lost to the module, the CANH transmitter’s
output stage is disabled.
4.16.4. CANL
CANL is an output driver stage that sinks current on the
CANL output. The sink type output is short circuit protected.
In the event that battery or ground is lost to the module, the
CANL transmitter’s output stage is disabled.
4.16.5. CANTXD
CANTXD input comes from the microcontroller and drives
that state of the CAN bus pins, CANH and CANL. A logic ‘0’
input drives the outputs to a differential (dominant) voltage,
where the CANH output is +3.5 V and the CANL output is +1.5
V. A logic ‘1’ input drives the outputs to their idle (recessive)
state, where the CANH and CANL outputs are +2.5 V. An
internal pull–up to VDDH shall guarantee a logic ”1” input level
if this input is left open. On power–up, or in the event of a
thermal shutdown, this input must be toggled high and then
low to clear the thermal fault latch. The faulted CAN bus
output(s) will remain disabled until the thermal fault latch is
cleared. The CAN bus data rate is determined by the data rate
of CANTXD.
4.16.6. CANRXD
This is a CMOS compatible output used to send data from
the CAN bus pins, CANH and CANL, to the microprocessor.
When the voltage differential between CANH and CANL is
under the differential input voltage threshold (recessive state),
CANRXD is logic ‘1’. When the voltage differential between
CANH and CANL is over the voltage threshold (dominant
state), CANRXD is logic ‘0’. In standby mode, input voltage
threshold remains the same. There is a minimum of 0.1 V of
hysteresis between the high and low (and vice versa)
transition points.
Figure 10. CAN Transceiver Block Diagram
–
+
–
+
25 k
W
25 k
W
5 k
W
5 k
W
2.5 V
10
A
0.8 – 2.0 V
0.5 – 1.0 V
CANRXD
AWAKE
CAN_EN
VDDH
OverTemp
Sense &
Hysteresis
VDDH
CAN_EN
CANL
CANH
CANTXD
CANRXD
Complimentary
High/Low Side
Drivers w/
Current Limit
4.16.7. CAN Over Temperature Latch Off Feature
If the CANH or CANL output is shorted to ground or battery
for any duration of time, an over temperature shut down circuit
disables the output stage. The output stage remains latched
off until the CANTXD input is toggled from a logic ’1’ to a logic
’0’ to clear the over temperature shutdown latch. Thermal
shutdown does not impact the remaining functionality of the
IC.
4.16.8. CAN Loss of Assembly Ground
The definition of a loss of ground condition at the device
level is that all pins of the IC (excluding transmitter outputs) will
see very low impedance to VBAT. The loss of ground is shown
on the module level in Figure 11. The nomenclature is suited
to a test environment. In the application, a loss of ground
condition results in all I/O pins floating to battery voltage. In
this condition, the CAN bus must not source enough current
to corrupt the bus.
4.16.9. CAN Loss of Assembly Battery
The loss of battery condition at the IC level is that the power
input pins of the IC see infinite impedance to the battery supply
voltage (depending upon the application) but there is some
undefined impedance looking from these pins to ground. In
this condition, the CAN bus must not sink enough current to
corrupt the bus. Refer to Figure 12.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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