參數(shù)資料
型號: KFG1216Q2A-DID6
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: FLASH MEMORY
中文描述: 閃存
文件頁數(shù): 95/114頁
文件大?。?/td> 1382K
代理商: KFG1216Q2A-DID6
OneNAND512(KFG1216x2A-xxB5)
FLASH MEMORY
95
Note 1)These parameters are tested based on INT bit of interrupt register. Because the time on INT pin is related to the pull-up and pull-down resistor
value.
Parameter
Symbol
Min
Typ
Max
Unit
Sector Read time(Note 1)
t
RD1
-
23
35
μ
s
Page Read time(Note 1)
t
RD2
-
30
45
μ
s
Sector Program time(Note 1)
t
PGM1
-
205
720
μ
s
Page Program time(Note 1)
t
PGM2
-
220
750
μ
s
OTP Access Time(Note 1)
t
OTP
-
500
700
ns
Lock/Unlock/Lock-tight Time(Note 1)
t
LOCK
-
500
700
ns
Erase Suspend Time(Note 1)
t
ESP
-
400
500
μ
s
Erase Resume Time(Note 1)
1 Block
t
ERS1
-
2
3
ms
2~64 Blocks
t
ERS2
4
6
ms
Number of Partial Program Cycles in the sector (Including main and
spare area)
NOP
-
-
2
cycles
Block Erase time (Note 1)
1 Block
t
BERS1
-
2
3
ms
2~64 Blocks
t
BERS2
-
4
6
ms
Multi BlocK Erase Verify Read time(Note 1)
t
RD3
-
70
100
μ
s
Parameter
Symbol
Min
Typ
Max
Unit
WE Cycle Time
t
WC
70
-
-
ns
AVD low pulse width
t
AVDP
12
-
-
ns
Address Setup Time
t
AWES
0
-
-
ns
Address Hold Time
t
AH
30
-
-
ns
Data Setup Time
t
DS
25
-
-
ns
Data Hold Time
t
DH
0
-
-
ns
CE Setup Time
t
CS
0
-
-
ns
CE Hold Time
t
CH
10
-
-
ns
WE Pulse Width
t
WPL
40
-
-
ns
WE Pulse Width High
t
WPH
30
-
-
ns
AVD Disable to WE Disable
t
VLWH
15
-
-
ns
WE Disable to AVD Enable
t
WEA
15
-
-
ns
5.8 AC Characteristics for Load/Program/Erase
Performance
See Timing Diagrams 6.8, 6.9, and 6.10
5.7 AC Characteristics for Asynchronous Write/Load/
Program/Erase Operation
See Timing Diagrams 6.7, 6.8 and 6.9
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