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參數(shù)資料
| 型號(hào)： | K7A203600A |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 64Kx36-Bit Synchronous Pipelined Burst SRAM |
| 中文描述： | 64Kx36位同步流水線突發(fā)靜態(tài)存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 7/15頁(yè) |
| 文件大?。?/td> | 413K |
| 代理商： | K7A203600A |
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PRELIMINARY
K7A203600A
64Kx36 Synchronous SRAM
- 7 -
Rev 2.0
December 1998
DC ELECTRICAL CHARACTERISTICS
(T
A
=0 to 70
°
C, V
DD
=3.3V
+
0.3V/-0.165V)
* V
IL
(Min)=-2.0(Pulse Width
≤
t
CYC
/
2)
** V
IH
(Max)=4.6(Pulse Width
≤
t
CYC
/
2)
** In Case of I/O Pins, the Max. V
IH
=V
DDQ
+0.5V
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
UNIT
Input Leakage Current(except ZZ)
I
IL
V
DD
=Max ; V
IN
=V
SS
to V
DD
-2
+2
μ
A
μ
A
Output Leakage Current
I
OL
Output Disabled, V
OUT
=V
SS
to V
DDQ
-2
+2
Operating Current
I
CC
Device Selected, I
OUT
=0mA,
ZZ
≤
V
IL
, All Inputs=V
IL
or V
IH
Cycle Time
≥
t
CYC
min
-22
-
440
mA
-20
-
400
-18
-
380
-16
-
360
-15
-
320
-14
-
280
Standby Current
I
SB
Device deselected, I
OUT
= 0mA,
ZZ
≤
V
IL
, f = Max,
All Inputs
≤
0.2V or
≥
V
DD
-0.2V
-22
-
110
mA
-20
-
100
-18
-
100
-16
-
90
-15
-
80
-14
-
70
I
SB1
Device deselected, I
OUT
= 0mA, ZZ
≤
0.2V,
f=0, All Inputs=fixed (V
DD
-0.2V or 0.2V)
-
20
mA
I
SB2
Device deselected, I
OUT
=0mA,
ZZ
≥
V
DD
-0.2V, f = Max, All Inputs
≤
V
IL
or
≥
V
IH
-
20
mA
Output Low Voltage(3.3V I/O)
V
OL
I
OL
= 8.0mA
-
0.4
V
Output High Voltage(3.3V I/O)
V
OH
I
OH
= -4.0mA
2.4
-
V
Output Low Voltage(2.5V I/O)
V
OL
I
OL
= 1.0mA
-
0.4
V
Output High Voltage(2.5V I/O)
V
OH
I
OH
= -1.0mA
2.0
-
V
Input Low Voltage(3.3V I/O)
V
IL
-0.5*
0.8
V
Input High Voltage(3.3V I/O)
V
IH
2.0
V
DD
+0.5**
V
Input Low Voltage(2.5V I/O)
V
IL
-0.3*
0.7
V
Input High Voltage(2.5V I/O)
V
IH
1.7
V
DD
+0.5**
V
TEST CONDITIONS
(V
DD
=3.3V+0.3V/-0.165V,V
DDQ
=3.3V+0.3/-0.165V or V
DD
=3.3V+0.3V/-0.165V,V
DDQ
=2.5V+0.4V/-0.125V, T
A
=0 to 70
°
C)
PARAMETER
VALUE
Input Pulse Level(for 3.3V I/O)
0 to 3V
Input Pulse Level(for 2.5V I/O)
0 to 2.5V
Input Rise and Fall Time(Measured at 0.3V and 2.7V for 3.3V I/O)
1ns
Input Rise and Fall Time(Measured at 0.3V and 2.1V for 2.5V I/O)
1ns
Input and Output Timing Reference Levels for 3.3V I/O
1.5V
Input and Output Timing Reference Levels for 2.5V I/O
V
DDQ
/2
Output Load
See Fig. 1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7A203600A-QC14 | 制造商:Samsung Semiconductor 功能描述:Synchronous SRAM, 64K x 36, 100 Pin, Plastic, QFP |
| K7A203600B | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:64Kx36/x32 Synchronous SRAM |
| K7A203600B-QC(I)14 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:64Kx36 & 64Kx32-Bit Synchronous Pipelined Burst SRAM |
| K7A203600B-QC14 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:64Kx36/x32 Synchronous SRAM |
| K7A203600B-QCI14 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:64Kx36 & 64Kx32-Bit Synchronous Pipelined Burst SRAM |
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